IDT I2C Interface
Revision 1.5
Integrated Device Technology, Inc.
CPS-16/12/8 User Manual
4 - 4
July 10, 2012
4.3.5
CRC Calculation
The EEPROM’s contents are protected by a 16-bit CRC at the end of the loaded image. The CRC does not
prevent incorrect data from loading; however, the CPS-16/12/8 will set the I2C_CHKSUM_FAIL status bit in
the I2C Master Control Register to indicate that the CRC failed.
The CRC is calculated using a standard CRC-16 polynomial x16 + x15 + x2 + 1 with an initial value of zero.
The algorithm used by the CPS-16/12/8 to calculate the CRC differs from standard CRC algorithms in that
the standard CRC algorithm normally pads the data by the width of the CRC as a final 16 bits of data to shift
through the algorithm. The CPS-16/12/8 does not do that, therefore, the standard CRC-16 algorithm will not
generate a correct CRC. The following algorithm will generate the CRC-16 expected at the end of the
EEPROM.
unsigned short icrc16(unsigned char* data, int numBytes) {
unsigned short remainder = 0;
unsigned char
crc[16];
unsigned char
byte;
unsigned char
bit_Pos;
unsigned char
bit_Pos_Mask;
unsigned char
carry;
unsigned char
serial_data;
unsigned int
word;
int data_byte_size;
int i, b;
remainder = 0;
memset(crc, 0, sizeof(crc));
for (b=0; b < numBytes; b++) {
byte = data[b];
bit_Pos_Mask = 0x80;
n + 2
0:7
Bits 6:13 of the block address
-
n + 3
0:7
Bits 14:21 of the block address
Bits 22:23 are zero
n + 4:n + 7
All
Bits 0:31 of the data to load into the
above address, (n + 1) to (n + 3)
-
n + 8:n + 11
All
Bits 0:31 of the data to load into
a 1 above
-
...
...
Remainder of block 2
-
...
...
Remainder of blocks M
-
z
0:7
Bits 0:7 of CRC
-
z + 1
0:7
Bits 8:15 of CRC
-
Table 4.1 EEPROM Register Address Map (Continued)
EEPROM
Address (byte
level addresses)
Bits
EEPROM Contents
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