Rev. 1.10
72
October 23, 2020
Rev. 1.10
73
October 23, 2020
BC66F5652
2.4GHz RF Transceiver A/D Flash MCU
BC66F5652
2.4GHz RF Transceiver A/D Flash MCU
• The f
H
clock will be on but the f
SUB
clock will be off and the application program will stop at the
“
HALT” instruction.
• The Data Memory contents and registers will maintain their present condition.
• The I/O ports will maintain their present conditions.
•
In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,
will be cleared.
• The WDT will be cleared and resume counting if the WDT function is enabled. If the WDT
function is disabled, the WDT will be cleared and then stopped.
Standby Current Considerations
As the main reason for entering the SLEEP or IDLE Mode is to keep the current consumption of the
device to as low a value as possible, perhaps only in the order of several micro-amps except in the
IDLE1 and IDLE2 Mode, there are other considerations which must also be taken into account by
the circuit designer if the power consumption is to be minimised. Special attention must be made to
the I/O pins on the device. All high-impedance input pins must be connected to either a fixed high or
low level as any floating input pins could create internal oscillations and result in increased current
consumption. This also applies to the device which has different package types, as there may be
unbonded pins. These must either be set as outputs or if set as inputs must have pull-high resistors
connected.
Care must also be taken with the loads, which are connected to I/O pins, which are set as outputs.
These should be placed in a condition in which minimum current is drawn or connected only to
external circuits that do not draw current, such as other CMOS inputs. Also note that additional
standby current will also be required if the LXT or LIRC oscillator has enabled
via configuration
option.
In the IDLE1 and IDLE2 Mode the system oscillator is on, if the peripheral function clock source
is derived from the high speed oscillator, the additional standby current will also be perhaps in the
order of several hundred micro-amps.
Wake-up
To minimise power consumption the device can enter the SLEEP or any IDLE Mode, where the
CPU will be switched off. However, when the device is woken up again, it will take a considerable
time for the original system oscillator to restart, stablise and allow normal operation to resume.
After the system enters the SLEEP or IDLE Mode, it can be woken up from one of various sources
listed as follows:
• An external falling edge on Port A
• A system interrupt
•
A WDT overflow
When the device executes the “HALT” instruction, it will enter the IDLE or SLEEP mode and
the PDF flag will be set to 1. The PDF flag will be cleared to 0 if the device experiences a system
power-up or executes the clear Watchdog Timer instruction. If the system is woken up by a WDT
overflow, a Watchdog Timer reset will be initiated and the TO flag will be set to 1. The TO flag is
set if a WDT time-out occurs and causes a wake-up that only resets the Program Counter and Stack
Pointer, other flags remain in their original status.
Each pin on Port A can be set using the PAWU register to permit a negative transition on the pin to
wake up the system. When a Port A pin wake-up occurs, the program will resume execution at the
instruction following the “HALT” instruction. If the system is woken up by an interrupt, then two
