on the Controller. For each Fault Logic circuit, the logic HIGH
pulse also goes to the Repeat Fault AND gate.
The logic LOW pulse from the NOT-Q output goes to status
indicator circuits and to the “B” input of the second one-shot.
Q.5.3.6.2
Second One-Shot(2.4 seconds)
At the end of the one-second logic LOW pulse from the first
one-shot, the LOW-to-HIGH transition triggers the second one-
shot. Only the Q output is used, and the one-shot generates a 2.4
second logic HIGH pulse which goes to the status indicator
circuits and to the Repeat Fault AND gate.
Q.5.3.6.3
Repeat Fault “AND” Gate
Figure Q-4(b) shows logic timing diagrams which may help
when reading the following discussion. The AND gate inputs
are the Q outputs from the first and second one-shots. During
normal transmitter operation, both inputs are LOW. When a
Type 2 Fault is detected, the first one-shot Q output goes HIGH,
but the other AND gate input remains LOW. After one second,
the first one-shot Q output goes LOW, the second one-shot is
triggered, and its Q output goes HIGH. The AND gate still has
one LOW and one HIGH input, so its output is still LOW.
When the second one-shot is triggered, the AND gate is set to
detect a repeat fault; if the first one-shot is triggered during the
one second logic HIGH pulse from the second one-shot, both
AND gate inputs will be HIGH and its output will go HIGH.
The “Repeated Fault-H” logic signal goes to an OR gate and
becomes a “Type 1 Fault-H” input to Type 1 Fault Gate U19-8.
The Repeated “Fault-H” logic signal also goes through the Reset
Retrigger gate to the Fault Latch.
Summary
A fault triggers the first one-shot which generates a pulse that
cycles the high voltage OFF for one second. then turns the PA
Power Supply back ON. The end of the first one-shot time-out
triggers the second one-shot and “arms” the Repeat Fault AND
gate. If no further faults are detected, the second one-shot times
out, and no further action is taken. If a second fault is detected
before the end of the second time-out, the AND gate output goes
HIGH, providing a Type 1 Fault and clocking the Status Indica-
tor latch.
Q.5.3.6.4
Type 2 Fault Status Indication Circuits
Status Indication circuits are the same for all three Type 2 Faults;
Figure Q-4(c) is a simplified diagram and Table Q-2 gives the
combinations for the fault status circuits. Each circuit includes
an AND gate, an Invertor/Driver for the RED LED section, an
Invertor/Driver for the External fault status output, an OR gate,
and a bicolor LED.
There are four possible conditions for each Type 2 Fault Color-
Stat™ panel LED:
•
GREEN: Normal indication.
•
AMBER: Occurs when the Type 2 Fault is detected. Both
the RED and GREEN sections of the bicolor LED are ON.
•
OFF: Occurs during the 2.4 second timeout period.
•
RED: Occurs if the Type 2 Fault is detected again before
the 2.4 second timeout.
Q.5.4
Type 3 Fault Circuits
Type 3 Faults LOWER transmitter power but do not turn off the
PA Power Supply. A “Type 3 Fault” can be generated by two
conditions:
•
Repeated VSWR “hits”
•
The heat sink temperature of PA Module RF1 or RF2
exceeds a pre-set limit.
The “Type 3 Fault” logic on the LED Board is driven by VSWR
sensing circuits on the Output Monitor and temperature sensing
circuits on the Driver Encoder/Temp Sense Board.
•
VSWR related Type 3 Faults latch one or both RED
“VSWR” indicators on the ColorStat™ panel ON.
•
Temperature related Type 3 Faults latch the RED “OVER
TEMP LED” on the Driver Encoder/Temp Sense Board ON.
Q.5.4.1
VSWR Logic
A VSWR problem which creates a Type 3 Fault occurs when a
serious impedance mismatch causes high reflected power. This
can happen as the result of a problem in the transmitter output
network or in the transmitter load — normally an antenna
system. This will cause a repeat VSWR “hit” as soon as the PA
OFF command is released. The repeated VSWR faults occur as
follows:
a. A VSWR “hit” generates a momentary PA OFF command
to turn off the RF output, then the transmitter cycles back
ON. For many VSWR fault conditions, removing RF
voltage will clear the condition and the VSWR fault will
not repeat.
b. If the VSWR condition is still present when the transmit-
ter cycles back ON, another VSWR “hit” will occur, and
the PA OFF command will turn off the RF output again.
c. If repeated VSWR trip cycles occur within a fixed time
period and the condition does not clear, a Type 3 Fault will
begin to lower transmitter power.
VSWR Detectors and Logic on the Output Monitor generate a
14 millisecond logic LOW pulse when a Bandpass Filter VSWR
(Output Network VSWR) is detected, and a 19 millisecond logic
LOW pulse when an Antenna VSWR (Load VSWR) is detected.
VSWR logic on the LED Board generates a logic signal and
status indicator output for each detected VSWR fault. Additional
logic signals are generated if a large number of VSWR faults
occur in a short time, indicating a serious impedance mismatch.
VSWR Logic on the LED Board is described in the following
paragraphs. VSWR Detectors and logic are described in SEC-
TION H, Output Sample Board and Output Monitor.
Q.5.4.1.1
Single VSWR Action
Refer to Figure Q-5, VSWR Logic, Simplified Diagram, or to
sheet 2 of the LED Board schematic diagram. For each SINGLE
VSWR fault, logic on the LED Board generates the following
signals:
FOR EITHER A BANDPASS FILTER OR AN ANTENNA VSWR:
a. PA OFF: NOR gate U3-10 generates a “VSWR Fault-L”
signal to PA OFF gate U40, to hold the PA off for 14 msec
or 19 msec.
DX-25U
Q-12
888-2297-002
Rev. R: 11-11-96
WARNING: Disconnect primary power prior to servicing.
