generates a fault, the ColorStat™ panel “Modulation Encoder
CABLE INTERLOCK” LED will illuminate red. Refer to the
interlock chart on sheet four of the Mod Encoder Schematic to
identify the RF amplifier numbers monitored by each interlock
LED.
NOTE
The LED supply voltages are muted by the DC Regulator when
the transmitter is OFF. In order to activate the DS1 display when
the transmitter is OFF, P1 on the DC Regulator must be placed
in the TEST position. It is normal for the BLOWN FUSE LED
and the PA OFF LED to be red under this condition. Return P1
to the NORMAL position after troubleshooting.
For example: If RF amplifier B8 (RF95) is not inserted into the
motherboard, the continuous circuit between J1-9 (INTL-1A)
and J1-19 (INTL-1B) will be open. This will make U62-4 more
positive than U62-5 and U62-2 would go to logic LOW. Inverter
U54-2 will go to logic HIGH and “INTRLK 1” LED on Mod
Encoder A37 will turn red. At the same time, U67-1 will go to
logic LOW and U67-8 will go to logic HIGH. This will force
U53-6 LOW and U56-4 HIGH. This “CABLE INTRLK-L”
signal is inverted by U56 and sent to the LED Board. The signal
can be monitored at TP6.
L.3.5
PA Off Circuit
The PA Off Circuit generates a “PAOFF-L” logic LOW signal
which clears all data latch outputs and illuminates the “PA OFF”
section of DS1 on the Modulation Encoder. Under this condition,
the PA Power Supply may be energized but there will be no RF
output from the transmitter. This signal is generated when any of
the following occur:
a. “CABLE INTRLK-L” fault.
b. “PWR-UP RESET-L”.
c. “PA TURN OFF-H” from fault and overload circuits on
the LED Board.
d. “PA TURN OFF-L” from the Output Monitor.
e. “PA TURN OFF-L” from the Analog to Digital Converter.
L.3.5.1
Circuit Description
Refer to sheets one and four of the Mod Encoder Schematic and
Figure L-3.
PA Turn-Off Logic on the Modulation Encoders consists of “OR”
gates, so that any of the input signals listed above will produce
the logic LOW “PAOFF-L” signal to the “Clear” inputs of all
data latches on the Modulation Encoders.
L.3.5.1.1
CABLE INTRLK-L FAULT Input.
When a “CABLE INTERLK-L” signal is present at U59-10,
inverter U56-4 will go to logic HIGH and force U53-8 output to
logic LOW. This forces U59-2 LOW to produce a “PAOFF-L”
signal at TP4.
The “CABLE INTRLK-H” signal at TP6 triggers fault detection
circuitry on the LED Board which generates an OFF command
to the Controller and returns a “PA TURN OFF-H” command
back to the Modulation Encoder at J18-5.
When the “PA TURN OFF-H” command from the LED Board
is present at TP7, two sections of U56 act as a delayed buffer to
force U53-8 LOW. This drives U59-4 LOW to produce the
“PAOFF-L” signal on the A37 Modulation Encoder at J18-8.
Inverter U56-4 goes to a logic HIGH which drives U53-8 to logic
LOW. This forces U59-2 to logic LOW, and produces the
“PAOff-L” signal. The “Cable Intrlk Fault” triggers fault detec-
tion circuitry on the LED Board. The LED Board will trigger the
OFF command on the Controller, and return a “PA TURN
OFF-H” command to the Modulation Encoders.
When “PA TURN OFF-H” is present at U56-11, two sections of
U56 act as a buffer to force U53-8 LOW. This drives U59-4 LOW
to produce the “PAOFF-L” signal on the Modulation Encoders.
L.3.5.1.2
PWR UP RESET-H Input.
The “PWR UP RESET-H” signal holds the PA Modules OFF for
approximately 20 milliseconds during Low Voltage Supply
power-up, to allow all supply voltages to reach normal operating
values. When the +5 VDC supply from the DC Regulator in
energized, inverting Schmitt Trigger U56-5 input is LOW and
U56-6 is HIGH which forces U53-8 LOW. This keeps U59-2
LOW and holds the PA Modules OFF.
When the +5 VDC supply is present, capacitor C4 charges
through R35. When the C4 voltage rises above the threshold of
Schmitt Trigger U56-5, U56-6 goes LOW. If no other PA OFF
signals are present, the “PAOFF-L” signal is removed and the PA
Modules turn ON.
L.3.5.1.3
PA TURN OFF-L Input from Analog to Digital Con-
verter
If a Conversion Error Fault occurs on the A/D Converter, a “PA
TURN OFF-L” logic LOW signal is applied to J17-28. The
signal is inverted at U59-6 and becomes the “PAOFF-L” signal.
L.3.5.1.4
PA TURN OFF-L Input from Output Monitor
If a VSWR fault is detected on the Output Monitor, a short pulse
is generated and applied as a “PA TURN OFF-L” input at J18-1.
The signal is inverted by U59-4 and becomes the “PAOFF-L”
signal.
L.3.6
Blown Fuse Circuits
The blown fuse circuits will cause the “RF AMP” LED on the
ColorStat™ panel to illuminate red when any of the 64 PA Modules
has a blown fuse. This will alert the operator of a fault condition on
one or more of the PA Modules. A visual inspection must be made
to determine which amplifier is at fault. The transmitter will NOT
turn OFF because of a red “RF AMP” LED.
L.3.6.1
Circuit Description
Refer to Mod Encoders Interconnect Diagram, Figure L-2, and
Blown Fuse Circuit Diagram, Figure L-4.
The Modulation Encoder has eight identical blown fuse circuits
and monitors 64 PA Modules by using the same connections as
the Cable Interlock circuitry.
A blown fuse on an RF amplifier is typically caused by a shorted
output device. A shorted MOSFET will apply a ground at the
junction of CR11 and DS1 or CR12 and DS2. An open fuse will
allow current to flow through the 56K resistor from the +230 VDC
PA Power Supply to illuminate the red LED. Current also flows from
the +22 VDC supply on the Modulation Encoder through the 33K
Section L - Modulation Encoder (A37)
Rev. T2: 06-27-97
888-2297-002
L-3
WARNING: Disconnect primary power prior to servicing.
