8-26
L60 Line Phase Comparison System
GE Multilin
8.1 OVERVIEW
8 THEORY OF OPERATION
8
Two levels of fast overcurrent supervision are required: fault detection low (FDL) for keying and fault detection high (FDH)
for tripping. These conditions are supervisory; therefore, they do not have to be very accurate. Instead, they shall be fast
enough not to slow down the remainder of the 87PC algorithm.
The fast magnitude is calculated as:
(EQ 8.4)
Figure 8–21: EXAMPLE OF MIXING CURRENT OPERATION (RELAY COMTRADE RECORD)
The response of the overcurrent condition to switch off transients, including current reversal on parallel lines and heavily
saturated CTs, is important. The key design requirement is keep the FDL and FDH picked up and resetting in a way that
ensures both dependability and security in both tripping and blocking arrangements.
From this perspective, to boost the magnitude on heavily saturated CTs, the RMS component is calculated as follows (on a
sample-by-sample basis):
(EQ 8.5)
In the above equation,
N
1
represents the number of samples per cycle (64).
The magnitude estimator combines the fast estimator for accuracy, the RMS value for dependability on CT saturation or
other severe transients, and the waveform peak for speed:
(EQ 8.6)
The local operating current is converted into phase pulses. It is important to realize that the operation is nonlinear, erasing
almost all information contained in the magnitude of the signal and presenting exclusively the phase information by encod-
ing the on/off pulses signifying polarity of the operating signal. This polarity is preserved with respect to the universal ana-
log time. This is one of the key advantages of the phase comparison principle, even when implemented digitally: no
synchronization is required between the individual relays of the 87PC scheme.
The raw LOC-al pulses (Positive and Negative polarity) are produced disregarding the FDL and FDH flags. The fault detec-
tor flags are used in the dual-breaker, key and trip logic. The raw pulses are calculated as follows.
For tripping schemes:
(EQ 8.7)
I
FAST
i
MIX
2
I
MIX
_
Q
2
+
=
F1-IA
F2-IB
F2-IC
87PC BKR1 current
1) Internal AG fault tripped single-pole.
2) Followed by the second interval
BG fault during the single-pole open condition
831802A1.CDR
3) Composite signal (negative-sequence) of the 87PC function
I
RMS k
2
N
1
-------
I
MIX k p
–
2
p
0
=
N
1
1
–
=
I
AUX
max
I
RMS
I
FAST
0.85 abs
i
MIX
=
LOC
1P_RAW
i
1_
MIX
0.005
2 CT
1pu
=
LOC
1N_RAW
i
1_
MIX
0.005
2 CT
1pu
–
=
Summary of Contents for L60
Page 10: ...x L60 Line Phase Comparison System GE Multilin TABLE OF CONTENTS ...
Page 57: ...GE Multilin L60 Line Phase Comparison System 2 27 2 PRODUCT DESCRIPTION 2 3 SPECIFICATIONS 2 ...
Page 58: ...2 28 L60 Line Phase Comparison System GE Multilin 2 3 SPECIFICATIONS 2 PRODUCT DESCRIPTION 2 ...
Page 482: ...6 26 L60 Line Phase Comparison System GE Multilin 6 5 PRODUCT INFORMATION 6 ACTUAL VALUES 6 ...
Page 554: ...10 8 L60 Line Phase Comparison System GE Multilin 10 2 BATTERIES 10 MAINTENANCE 10 ...
Page 674: ...B 110 L60 Line Phase Comparison System GE Multilin B 4 MEMORY MAPPING APPENDIX B B ...
Page 704: ...C 30 L60 Line Phase Comparison System GE Multilin C 7 LOGICAL NODES APPENDIX C C ...
Page 720: ...E 10 L60 Line Phase Comparison System GE Multilin E 1 PROTOCOL APPENDIX E E ...
Page 732: ...F 12 L60 Line Phase Comparison System GE Multilin F 2 DNP POINT LISTS APPENDIX F F ...
Page 742: ...H 8 L60 Line Phase Comparison System GE Multilin H 3 WARRANTY APPENDIX H H ...