Interface
5-56
C141-E171-03EN
Table 5.6 Diagnostic code
Code
Result of diagnostic
X’01’
X’02’
X’03’
X’04’
X’05’
X’07’
X’08’
X’09’
X’8x’
No error detected.
HDC diagnostic error
Buffer diagnostic error
SRAM diagnostic error
MPU diagnostic error
ROM sum check error
Failure of HDC PVT cell
Failure of HDC DE/ECC
Failure of device 1
attention: The device responds to this command with the result of power-on
diagnostic test.
At command issuance (I/O registers setting contents)
1F7
H
(CM)
1
0
0
1
0
0
0
0
1F6
H
(DH)
x
x
x
DV
Head No. /LBA
[
MSB]
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(FR)
xx
xx
xx
xx
xx
At command completion (I/O registers contents to be read)
1F7
H
(ST)
Status information
1F6
H
(DH)
x
x
x
DV
Head No. /LBA
[
MSB]
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(ER)
xx
xx
01
H
(*1)
01
H
Diagnostic code
*1
This register indicates X’00’ in the LBA mode.
Summary of Contents for MHS2020AT
Page 1: ...C141 E171 03EN MHS2060AT MHS2040AT MHS2030AT MHS2020AT DISK DRIVES PRODUCT MANUAL ...
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Page 60: ...Theory of Device Operation 4 6 C141 E171 03EN Figure 4 3 Circuit Configuration ...
Page 190: ...Interface 5 114 C141 E171 03EN g d f f d e Figure 5 7 Normal DMA data transfer ...
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