Interface
5-96
C141-E171-03EN
At command issuance (I/O registers setting contents)
1F7
h
(CM)
0
0
1
1
0
1
1
1
1F6
h
(DH)
1
L
1
DV
xx
1F5
h
(CH) P
1F5
h
(CH) C
1F4
h
(CL) P
1F4
h
(CL) C
1F3
h
(SN) P
1F3
h
(SN) C
SET MAX LBA (47-40)
SET MAX LBA (23-16)
SET MAX LBA (39-32)
SET MAX LBA (15-8)
SET MAX LBA (31-24)
SET MAX LBA (7-0)
1F2
h
(SC) P
xx
1F2
h
(SC) C
xx
VV
1F1
h
(FR) P
1F1
h
(FR) C
xx
xx
C: Current
P: Previous
At command completion (I/O registers contents to be read)
1F7
h
(ST)
Status information
1F6
h
(DH)
1
L
1
DV
xx
1F5
h
(CH) 1
1F5
h
(CH) 0
1F4
h
(CL) 1
1F4
h
(CL) 0
1F3
h
(SN) 1
1F3
h
(SN) 0
1F2
h
(SC) 1
1F2
h
(SC) 0
1F1
h
(ER)
SET MAX LBA (47-40)
SET MAX LBA (23-16)
SET MAX LBA (39-32)
SET MAX LBA (15-8)
SET MAX LBA (31-24)
SET MAX LBA (7-0)
xx
xx
Error information
0: HOB=0
1: HOB=1
(40) FLUSH CACHE EXT (EAH)
•
Description
This command executes the same operation as the Flush Cache command
(E7h) but only LBA = 1 can be specified.
•
Error reporting conditions
This command is issued with LBA = 0. (ST = 51h, ER= 10h: Aborted)
Summary of Contents for MHS2020AT
Page 1: ...C141 E171 03EN MHS2060AT MHS2040AT MHS2030AT MHS2020AT DISK DRIVES PRODUCT MANUAL ...
Page 4: ...This page is intentionally left blank ...
Page 8: ...This page is intentionally left blank ...
Page 10: ...This page is intentionally left blank ...
Page 12: ...This page is intentionally left blank ...
Page 34: ...This page is intentionally left blank ...
Page 40: ...This page is intentionally left blank ...
Page 60: ...Theory of Device Operation 4 6 C141 E171 03EN Figure 4 3 Circuit Configuration ...
Page 190: ...Interface 5 114 C141 E171 03EN g d f f d e Figure 5 7 Normal DMA data transfer ...
Page 240: ...This page is intentionally left blank ...
Page 244: ...This page is intentionally left blank ...
Page 246: ...This page is intentionally left blank ...
Page 250: ...This page is intentionally left blank ...
Page 252: ...This page is intentionally left blank ...
Page 253: ......
Page 254: ......