
Interface
5-54
C141-E171-03EN
At command issuance (I/O registers setting contents)
1F7
H
(CM)
1
1
1
1
1
0
0
1
1F6
H
(DH)
x
x
x
DV
xx
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
xx
xx
xx
1F2
H
(SC)
xx
1F1
H
(FR)
04
At command completion (I/O registers contents to be read)
1F7
H
(ST)
Status information
1F6
H
(DH)
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
xx
xx
xx
xx
xx
1F1
H
(ER)
Error information
(17) READ NATIVE MAX ADDRESS (F8)
This command posts the maximum address intrinsic to the device, which can be
set by the SET MAX ADDRESS command. Upon receipt of this command, the
device sets the BSY bit and indicates the maximum address in the DH, CH, CL
and SN registers. Then, it clears BSY and generates an interrupt.
At command issuance (I/O registers setting contents)
1F7
H
(CM)
1
1
1
1
1
0
0
0
1F6
H
(DH)
x
L
x
DV
xx
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(FR)
xx
xx
xx
xx
xx
Summary of Contents for MHS2020AT
Page 1: ...C141 E171 03EN MHS2060AT MHS2040AT MHS2030AT MHS2020AT DISK DRIVES PRODUCT MANUAL ...
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Page 60: ...Theory of Device Operation 4 6 C141 E171 03EN Figure 4 3 Circuit Configuration ...
Page 190: ...Interface 5 114 C141 E171 03EN g d f f d e Figure 5 7 Normal DMA data transfer ...
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