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CXR Larus 80-100-400 Issue 2 July 2006 page
3-45
3.3813 Features:
a. Two independent phase detectors allowing two of the five inputs to be
measured simultaneously.
b. Flash EPROM for software updates.
3.3814 Inputs:
a. Five DS1 inputs, SF or ESF framing with AMI or B8ZS line code:
·
DS1 input reference A (bridges input to 54511 card A when installed in
the first SM slot of the 54500 shelf).
·
DS1 input reference B (bridges input to 54511 card B when installed in
the first SM slot of the 54500 shelf).
·
Three external inputs (3, 4, and 5) when installed in the first SM slot,
five additional external inputs (6 through 10) when installed in the
second SM slot. Input 5 (and Input 10 on the second card) can also be
supplied from the front panel MON IN jack.
b. Clock input used as a reference for all phase measurements,
transistor-transistor logic (TTL) from track and hold card A or B, the same
clock selected as active by the output cards of the system, i.e., the better
locally available clock. Note that the reference clock selection is under
microprocessor control and may be manually overridden if desired.
3.3815 Input
Impedance:
a.
Terminating
DS1 100 ohms ±10% balanced
b.
Bridging
DS1 1000 ohms ±10%
c.
Monitor
DS1 437 ohms Tip side, 437 ohms Ring side
Requires external balanced resistors to the Input Monitor Terminals
