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CXR Larus  80-100-400  Issue 2  July 2006             page        

3-33

Front Panel Label 

LED Color 

Indication 

FAIL Red 

 

Card 

fail 

INPUT A 

Green 

Input A select, tracking 

INPUT B  

Green 

Input B select, tracking 

HOLD 

Yellow 

Hold, not tracking 

ACQUIRE 

Green 

Acquiring reference signal 

LOCKED Green 

Locked 

(normal) 

FREERUN 

Yellow 

Free run, not tracking 

ACTIVE 

Green 

Driving output cards 

GPS 

Green 

Global Positioning System, tracking GPS signal 

DEGRADED 

Yellow 

Degraded, tracking in Stratum 1/PRC  degraded 
region 

 
 
3.3631  Controls and Monitoring: 
 

a.  Test pushbutton (press for up to 6 seconds).  In the DS1/E1 tracking state 

only, momentary hold test; display shows 'H' if successful. (There is no 
response in the GPS mode.)  Does not disrupt tracking.  In invalid output 
state, resets tracking algorithm to FREERUN state; display shows 'r'.  (An 
internal TEST/RUN toggle, S2, is set in RUN mode for normal operation.) 

 

b.  Monitor jack (-20 dB), framed all ones at clock output frequency. 

 

c.  Software control for setting SF/ESF or CCS/CAS framing on both input 

channels. 

 

d.  EEPROM for storing last best guess for DDFS. 

 

e.  Flash EPROM for software updates. 

 

f.  Temperature sensor for future software algorithms for temperature 

compensated holdover. 

 

g.  Predictive holdover feature that remembers the average correction it has 

been making and continues the average correction while in holdover to 
cancel aging. 

 
3.3632  Seven Segment Status Display: 
 

a.  Status conditions while in tracking or acquisition state (display blinks every 

1 to 2 seconds): 

 

 

ACQUIRE 1 state (single dot). 

 

o   

At top of display:  Normal tracking, no phase error. 
Alternates with display of input reference.* 

 

o   

At bottom of display:  Correction in progress due to more than 1/4 
bit phase change.* 

 

P   

Displayed momentarily immediately after power-up if input card is 

Summary of Contents for 54500-16

Page 1: ...T1 E1 Synchronization Timing System VOLUME 1 System Description This manual applies to the following equipment Model Model 54500 16 54541 2 54500 17 54542 2 54501 1 54550 21 54502 1 54550 22 54505 0 5...

Page 2: ...CXR Larus Corporation Company Manual 80 100 400 Issue 1 July 2006 www cxrlarus com CXR Larus Corporation 894 Faulstich Court San Jose CA 95112 Tel 408 573 2700 Copyright 2006...

Page 3: ...2 13 3 Specifications 3 1 3 1 General 3 1 3 2 StarClock 200E Mounting Elements 3 1 3 21 Model 54500 Mounting Shelf 3 1 3 22 Environmental Limitations 3 1 3 3 Cards 3 3 3 31 Model 54511 T1 Input Card...

Page 4: ...Clock Card 5 62 5 20 ation 54522 and 54523 Cards tratum 1 PRC Track and Stratum 5 81 Functions 5 27 cription tratum 1 PRC Track and Stratum 2 TNC Card ent Card 5 1 5 1 General 5 1 5 2 Backplane 5 1 5...

Page 5: ...ppendix AA vs AB Architecture A 1 Appendix B System Behavior Phase Alignment AB 1 G 1 um A A Glossary Vol e 1 Figures section topic pa 1 3 tarClock 200E Front Panel Layout 1 8 2 2 k 200E Stratum 2 TNC...

Page 6: ...t Driver Card 3 77 3 17 Model 54577 5 10 MHz Output Driver Card 3 80 4 1 Clock Auto selection State Diagram 4 3 5 1 StarClock 200E Mounting Shelf Backplane Model 54511 545 5 2 5 3 Model 54513 Input Ca...

Page 7: ...This page is intentionally left blank...

Page 8: ...d is intended for use by field support engineers technicians and craft personnel Volume 3 Manual 80 800 400 the Model 54550 Information Management Card TL1 ITL1 User Manual provides a discussion of th...

Page 9: ...twork Equipment Building System NEBS compatible 19 23 inch 48 2 58 4 cm rack mounting shelf Model 54500 16 for the E1 application or Model 54500 17 for the T1 application The shelves contain backplane...

Page 10: ...__________________________________________________ CXR Larus 80 100 400 Issue 1 July 2006 1 3 NOTE many of the output cards have twenty outputs each Figure 1 2 StarClock 200E Master Shelf System Block...

Page 11: ...output with the input and making suitable correction to the frequency synthesizer 1 213 In Stratum 1 T1 or Primary Reference Clock E1 systems the input tracking reference is derived from a set of ces...

Page 12: ...e in North America AA architecture is used in some international locations 1 218 The StarClock 200E track and hold clock cards have phase alignment circuitry that causes the secondary input track and...

Page 13: ...ards produce twenty output signals each with the exception of Models 54575 and 54577 1 223 StarClock 200E master shelf can contain auxiliary cards that measure the performance of the system provide in...

Page 14: ...l ones 54573 4 2 048 MHz Square Wave 54574 2 1 544 MHz EIA RS 422 Square Wave 54575 4 8 kHz EIA RS 422 Square Wave 54575 5 and 5 10 MHz 54577 1 312 The system may also include one or two 54541 2 T1 or...

Page 15: ...1 July 2006 ___________________________________________________________ __________________________________________________________ CXR Larus 80 100 400 Issue 1 July 2006 1 8 Figure 1 3 Typical StarClo...

Page 16: ...is not supported with GPS Track and hold cards in any combination must provide the same input architecture either AA or AB 1 34 General GPS Information 1 341 The 54591 and 54593 cards incorporate a GP...

Page 17: ...Time Assembly The Precision Time Assembly compares this 1PPS with the on board frequency reference of the 54591 54593 to develop a time correction factor for the precision oscillator 1 345 A GPS failu...

Page 18: ...and a 54510 expansion shelf is 558 Utilizing eight expansion shelves up to 3 062 outputs non protected can be realized 1 4 Cards Note A complete circuit description of each StarClock 200E card is pre...

Page 19: ...Interface Software E1 Menu Control Interface Software 54550 23 AB 54550 24 AB 54550 21 AB 54550 22 AB Alarm Interface Card master shelf use only for master shelf or expansion shelf 54560 2 54560 3 T1...

Page 20: ...mposite clock or square waves synchronized to a suitable framed DS1 or E1 reference 5 or 10 MHz reference or GPS atomic time reference Jitter and wander attenuation is a standard function of the track...

Page 21: ...enter the free run condition after a prescribed time without a suitable input reference The oscillators can also be put in free run for testing If both cards fail the system will use either input if...

Page 22: ...ITU T G 811 j Holdover stability 1 x 10 10 for 48 hours for Stratum 2 k Invalid input signal detection feature of 54511 54512 Input Cards 54522 54523 54591 and 54593 Track and Hold Clock Cards and 545...

Page 23: ...ock Card Any combination of output driver cards up to ten listed in paragraph 1 66 A minimal redundant system requires two 54511 54512 and two 54522 5 cards Reference NOTE below 1 64 A minimal Stratum...

Page 24: ...he 54500 shelf refer to the equipment list in Section 7 One 54580 2 or 4 Network Time Server NTS Card 1 7 Installation Advice 1 71 This system is intended for installation in the telephone central off...

Page 25: ...5 For additional wiring convenience Model 54505 0 Wirewrap Interface Panel is available This is installed either directly above or directly below the main shelf and it provides 100 sets of T R S wirew...

Page 26: ...annel banks and any other equipment requiring network synchronization General considerations of network timing distribution Input timing may be derived from existing traffic bearing DS1 or E1 framed s...

Page 27: ...for digital traffic between switches and digital crossconnects no impairments are observed even when the SONET or SDH system is untimed However it is recommen With either SONET or SDH the multiplex e...

Page 28: ..._______________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 2 3...

Page 29: ...CXR Larus 80 100 400 2 4 Issue 1 July 2006 ______________________________________________________________...

Page 30: ..._______________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 2 5...

Page 31: ...CXR Larus 80 100 400 2 6 Issue 1 July 2006 ______________________________________________________________...

Page 32: ...is described in References 1 and 2 paragraph 2 25 and the E1 in References 1 2 and 3 paragraph 2 26 Clocks are grouped into levels based on their ability to maintain accurate timing if their referenc...

Page 33: ..._________________ NOTE This common reference source is called a Synchronization Timing System STS and is intended to feed a reference signal to all digital equipment within a building As a result all...

Page 34: ...10 8 day 3 5 hours 3 4 6 x 10 6 Must be capable of synchronizing to clock with accuracy of 4 6 10 x 6 3 7 x 10 7 day 6 minutes 255 in 24 hours 4E 32 x 10 6 Must be capable of synchronizing to clock wi...

Page 35: ...ge Stability Calculated Time To First Frame Slip Primary Reference Clock 1 x 10 11 N A N A 70 days Transit Node Clock N A Not specified Initial frequency offset of 5 x 10 10 Frequency drift of 1 x 10...

Page 36: ...etailed rules for There are no fixed rules for the number of Central Clocks that can be used in a cascade Any clock can track any other clock of equal or higher level and will filter out any jitter an...

Page 37: ...nces 1 and 2 paragraphs 2 25 and 2 26 to avoid timing loops If a string of more than one SONET SDH add drop multiplexer ADM exists between Central Clock timed offices no secondary references should be...

Page 38: ...s 3 clocks suitable for plesiochronous operation of international digital links 4 al networks which are based on the synchronous digital hierarchy SDH 5 Terminal Equipment DTE and Data Circuit Termina...

Page 39: ...This page is intentionally left blank...

Page 40: ...3E LNC Stratum 2 TNC Stratum 1 PRC Cold start 2 28 amps 3 80 amps 4 00 amps After warmup 1 83 amps 2 20 amps 2 30 amps Expansion shelf only 0 90 amps 0 90 amps 0 90 amps 3 212 Approximate Power Consu...

Page 41: ...lled to 5 C with respect to the normal or average ambient temperature That is the ambient temperature may reside within 0 C to 45 C but the variance in temperature must be held to a 5 C deviation for...

Page 42: ...r use with external 432 ohm bridging resistors b One wire interface input from the 54550 for setting framing and an input select line from the track and hold for selecting which input signals to place...

Page 43: ...re 3 1 Model 54511 T1 Input Card Front Panel NOTE For Model 54512 3 the INPUT designation is SQ ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page...

Page 44: ...and hold cards b Differential recovered input clock signal to output driver cards used only if both track and hold cards fail c Alarm signal to 54560 Alarm Interface Card d One wire interface to 5455...

Page 45: ...2 Bridging input 984 ohms Same signal levels as item 1 3 Monitor input 120 ohms Pulse amplitude range 0 05 volt to 0 3 volt base to peak b 2048 kHz Inputs 1 Terminating input 120 ohms Pulse amplitude...

Page 46: ..._______________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 7 Figure 3 2 Model 54512 4 E1 Input Card Front Panel NOTE For the Model 54512 3 the INPUT designation is changed t...

Page 47: ...oes not apply 3 325 Automatic Line Buildout ALBO a E1 Inputs Dynamic range 0 to 36 dB b 2048 kHz Inputs Dynamic range 0 to 15 dB 3 326 Duty Cycle 50 for all input types 3 327 Ones Density Not less tha...

Page 48: ...s 2 048 MHz clock recovered from either input selected by the corresponding track and hold card converted to 1 544 MHz for output on the backplane to both track and hold cards b Differential recovered...

Page 49: ...IS 3 3293 Card Power 48 volts 40 mA nominal 3 3294 Power Fuse 0 75 amp Type GMT 3 3295 Fuse Alarm Closure to battery 3 33 Model 54513 Composite Clock 5 MHz 10 MHz RS 422 Input Card 3 331 For the front...

Page 50: ...___________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 11 Figure 3 3 Model 54513 Input Card Front Panel...

Page 51: ...track and hold card for selecting which input signals to place on the output lines c Serial Data input from both track and hold cards to the transceiver d Serial Clock from both track and hold cards t...

Page 52: ...ory control information and other customer designated data LED status and slot ID e Front panel monitor jack for active input signal f Serial communication path through system backplane to from track...

Page 53: ...Fig 3 4 Model 54522 Stratum 3E Track and Hold Card ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 14...

Page 54: ...s within 9 4 Hz c 2048 kHz Inputs Recovered clock from 54512 3 input cards nominal 2 048 MHz tracks within 9 4 Hz d Composite Clock Inputs Recovered clock from 54513 3 input cards nominal 64 KHz track...

Page 55: ...hitecture Track and Hold Card B lights the Input A LED when it is tracking Input B and the Input B LED when it is tracking Input A Selection of the other input can be done by a track and hold card whe...

Page 56: ...00 seconds ACQUIRE 2 state 3 3445 Settling time 3000 seconds in normal tracking state 3 3446 Output Signals a Ovenized crystal oscillator derived from nominal clock frequency of 1 544 MHz tracks input...

Page 57: ...s r An internal TEST RUN toggle S2 is set in RUN mode for normal operation b Monitor jack 20 dB framed all ones at clock output frequency c Software control for selecting SF ESF or CCS CAS framing for...

Page 58: ...thesizer control in bottom 25 of range Primary input in use Secondary input in use c Standalone state Internal switch S2 in TEST position Not recommended for normal use r Free running state No input i...

Page 59: ...54523 refer to Figure 3 5 3 3521 Provisioning Model 54523 3 supports the AB input architecture 3 3522 Input Signals a DS1 Inputs Recovered clock from 54511 input cards nominal 1 544 MHz tracks within...

Page 60: ...within 9 4 x 10 2 Hz i Serial Data In from transceivers on both input cards j Transceiver Select lines from other track and hold card 3 3523 Framing Format a DS1 Inputs SF or ESF on each input automat...

Page 61: ...Fig 3 5 Model 54523 Stratum 2 Track and Hold Card ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 22...

Page 62: ...3 to 1 5 volt RMS into an impedance of 50 ohms This feature is not available for reference replacement on the track and hold cards but can be used as tertiary input i e able to be tracked 3 3530 Osci...

Page 63: ...MHz rubidium derived clock tracking input reference or holding differential backplane signal drives up to ten output cards and one or two 54541 or 54542 Synchronization Monitor Cards b Clock monitor...

Page 64: ...guess for DDFS e Flash EPROM for software updates f Temperature sensor for future software algorithms for temperature compensated holdover g Predictive holdover feature that remembers the average cor...

Page 65: ...king has occurred Happens on power up if TEST pushbutton is not being pressed and no good DS1 E1 inputs are present b Error conditions when card goes into HOLD state 2 Excess BPVs does not cause hold...

Page 66: ...e is not supported NOTE A description of the AB architecture is provided in Appendix A 3 3613 Input Signals Stratum 1 PRC Primary Reference Source PRS is an integral GPS receiver per Bellcore GR 2830...

Page 67: ...Data Input from transceivers on corresponding input card h Transceiver Select lines from the other track and hold card i Weak RF downlink signal from GPS satellites hitting the rooftop antenna This s...

Page 68: ...___________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 29 Fig 3 6 Model 54591 GPS Stratum 1 PRS Track and Stratum 3E LNC Hold Clock Card...

Page 69: ...lerance Per Bellcore TR NWT 000499 and ITU T G 824 3 3618 Input Signal Selection Input to track and hold cards A and B is normally from their own fully integrated GPS receiver If the normal GPS input...

Page 70: ...1 x 10 8 per day over any 5 C temperature range 3 3624 Traceability 1 x 10 11 3 3625 Warmup Time If the 54591 has been unplugged for more than 20 minutes it can take up to 5 hours before the GPS rece...

Page 71: ...backplane signal drives up to ten output cards and the 54541 or 54542 Synchronization Monitor Card s b Clock monitor framed all ones c Hold indication bus to output cards d Combined software hardware...

Page 72: ...algorithm to FREERUN state display shows r An internal TEST RUN toggle S2 is set in RUN mode for normal operation b Monitor jack 20 dB framed all ones at clock output frequency c Software control for...

Page 73: ...fused with DS1 E1 error condition 9 The lower case g letter has a tail segment that is not present on the digit 9 g Displayed when unit has entered GPS in Position Average mode This is the non steady...

Page 74: ...se Alarm Closure to battery 3 37 Model 54593 GPS Stratum 1 PRC Track and Stratum 2 TNC Hold Clock Card 3 371 For an illustration of the Model 54593 refer to Figure 3 7 3 3711 This card provides Stratu...

Page 75: ...Hz Inputs Recovered clock from 54513 5 input cards nominal 10 MHz tracks within 46 Hz g 1 544 MHz RS 422 Inputs Recovered clock from 54513 6 input cards nominal 1 544 MHz tracks within 7 7 x 10 2 Hz h...

Page 76: ...___________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 37 Fig 3 7 Model 54593 GPS Stratum 1 PRC Track and Stratum 2 TNC Hold Clock Card...

Page 77: ...l Selection Input to track and hold cards A and B is normally from their own fully integrated GPS receiver If the normal GPS input fails the track and hold card will post an alarm and try to acquire t...

Page 78: ...receiver has achieved Stratum 1 PRC accuracy If the 54593 has been unplugged for less than 20 minutes it can take up to 2 hours before the GPS receiver has achieved Stratum 1 PRC accuracy in the Known...

Page 79: ...d Combined software hardware alarm indication to 54560 Alarm Interface Card e Hardware alarm indication to 54550 Information Management Card f Serial data link to 54550 Information Management Card fo...

Page 80: ...e in the GPS mode Does not disrupt tracking In invalid output state resets tracking algorithm to FREERUN state display shows r An internal TEST RUN toggle S2 is set in RUN mode for normal operation b...

Page 81: ...048 MHz square wave input card 54512 3 g Displayed when unit has successfully entered GPS in Known mode This is the normal steady state indication Not to be confused with DS1 E1 error condition 9 g Di...

Page 82: ...725 Power Fuse 2 amps Type GMT 3 3726 Fuse Alarm Closure to battery 3 38 Model 54541 T1 Synchronization Monitor Card 3 3810 For the front panel of the Model 54541 refer to Figure 3 8 3 3811 The T1 Syn...

Page 83: ...Figure 3 8 Model 54541 T1 Synchronization Monitor Card ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 44...

Page 84: ...5 when installed in the first SM slot five additional external inputs 6 through 10 when installed in the second SM slot Input 5 and Input 10 on the second card can also be supplied from the front pane...

Page 85: ...s b DS1 error and performance parameters Out of frame OOF events includes AIS LOS events BPV errored seconds count CRC6 errored seconds counts for ESF Mild 1 to 319 CRC6 errors Severe 320 or more CRC6...

Page 86: ...parameters to be measured the inputs to be scanned the observation interval 1 to 100 000 seconds in decade steps and the number of consecutive intervals iterations to be observed on a given input Up t...

Page 87: ...ve Synchronization Monitor Card 3 3910 For the front panel of the Model 54542 refer to Figure 3 9 3 3911 The E1 2 048 MHz Square Wave Synchronization Monitor Card is microprocessor controlled with loc...

Page 88: ...under microprocessor control and may be overridden if desired 3 3915 Input Impedance a Terminating E1 2048 KHz 120 ohms 10 balanced a Bridging E1 2048 KHz 984 ohms 10 balanced a Monitor E1 2048 KHz 1...

Page 89: ...and performance parameters Out of frame OOF events includes AIS LOS events BPV errored seconds count CRC4 errored seconds counts for CRC4 ES 1 to 805 CRC4 errors SES more than 805 CRC4 errors Frame er...

Page 90: ...___________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 51 Figure 3 9 Model 54542 E1 2 048 MHz Square Wave Synchronization Monitor Card...

Page 91: ...cumulated values are stored separately for the 24 most recent one hour intervals on a rotating basis the last 24 hours are stored at any point Each complete rollover of 24 one hour intervals is summar...

Page 92: ...RC FBE Yellow Cyclic Redundancy Check Sum Frame Bit Error TIE Yellow Time Interval Error MTIE Yellow Maximum Time Interval Error SLIP Yellow Controlled slip event 193 bits UI phase error JITTER Jitter...

Page 93: ...el 54550 IMU and track and hold clock card must support the same input architecture AA or AB Flash EPROM for software updates large enough to store both TL1 ITL1 and menu versions of the software 128K...

Page 94: ...___________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 55 Fig 3 10 Model 54550 Information Management Card...

Page 95: ...om 1200 to 9600 baud May also be used with a modem requires a straight cable different from previous products b EIA RS 232D for remote access supporting standard modem control leads Rates selectable f...

Page 96: ...arm and status information Retrieve alarm log Set alarm cutoff to 54560 NOTE This is an abbreviated list For a complete list refer to Larus Manual 80 800 400 TL1 ITL1 or 80 801 400 Menu 3 4015 LED Ind...

Page 97: ...s from track and hold cards and Synchronization Monitor Card s encoding alarm severity on their alarm leads 3 4112 Outputs a Four floating relay contact closures Form A for summary major and minor aud...

Page 98: ...D Color Indication FAIL Red Card fail fuse or power supply 48 VA Yellow 48 VA not present 48 VB Yellow 48 VB not present MAJOR Red Major Alarm MINOR Yellow Minor Alarm ACO Yellow Alarm Cutoff 3 4115 C...

Page 99: ...Figure 3 11 Model 54560 Alarm Interface Card ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 60...

Page 100: ...tput card does not cause an error on another card s output 3 4213 Output Load Impedance 100 ohms 5 resistive 3 4214 Output Pulse Amplitude 3 volts 0 6 volt peak meets AT T CB 119 and CCITT G 703 requi...

Page 101: ...Fig 3 12 Model 54571 T1 Output Driver Card ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 62...

Page 102: ...e faceplate that selects Protected or Non Protected operation with a matching output card 3 4222 LED Indicators Front Panel Label LED Color Indication FAIL Red Card fail CLK A Green Clock A selected C...

Page 103: ...135 ohms 5 resistive 3 4314 Output Pulse Amplitude 4 0 volts 1 0 volt base to peak Maximum jitter 0 03 UI peak to peak measured within the frequency range of 20 Hz to 20 kHz 3 4315 Rearrangement Phas...

Page 104: ...bel LED Color Indication FAIL Red Card fail CLK A Green Clock A selected CLK B Green Clock B selected I P A Yellow Input A selected I P B Yellow Input B selected OVERRIDE Yellow Override manual select...

Page 105: ...Figure 3 13 Model 54572 Composite Clock Output Driver Card ___________________________________________________________ CXR Larus 80 100 400 Issue 2 July 2006 page 3 66...

Page 106: ...y manual remote selection 3 4412 Output Signals 54573 Bipolar E1 framed all ones at nominally 2 048 MHz CAS CCS or CRC4 framing common frame and multiframe synchronized with other E1 output cards 5457...

Page 107: ..._________________________________________________ CXR Larus 80 100 400 Issue 1 July 2006 page 3 73 Fig 3 14 Model 54573 E1 Output Driver Card...

Page 108: ...0 100 400 Issue 1 July 2006 _________________________________________________________ __________________________________________________ page 3 74 Figure 3 15 Model 54574 2 048 MHz Square Wave Output...

Page 109: ...4573 only e the 54560 The number of output failures is monitored by the 54550 f ts Protected or Non Protected operation with a matching output card 3 olar E1 framed all ones 3 volts 0 6 volt base to p...

Page 110: ...iver Card 3 4510 For the front panel of the Model 54575 refer to Figure 3 16 3 4511 Input Signal Differential 1 544 MHz TTL clock signal from one of the two track and hold cards or if both of these ha...

Page 111: ..._________________________________________________ CXR Larus 80 100 400 Issue 1 July 2006 page 3 77 Figure 3 16 Model 54575 RS 422 Output Driver Card...

Page 112: ...s the loss of one or more outputs b One wire interface to 54550 Information Management Card reports personality and LED and output status and can disable the capacity of any specific output to generat...

Page 113: ...tput card produces frame synchronization for the rest of the output cards plugging in an output card does not cause an error on another card s output 3 4613 Output Load Impedance 50 ohms 5 resistive 3...

Page 114: ...arus 80 100 400 Issue 1 July 2006 __________________________________________________________ __________________________________________________ page 3 80 Figure 3 17 Model 54577 5 10 MHz Output Driver...

Page 115: ...en Clock A selected CLK B Green Clock B selected I P A Yellow Input A selected I P B Yellow Input B selected OVERRIDE Yellow Override manual selection OUTPUT LOSS Red Output loss 3 4620 Card Power 48...

Page 116: ...inputs input outputs and outputs 3 4710 Inputs a DS1 E1 2048 KHz Inputs 3 terminations 2 wirewrap pins plus ground CC 5 MHz 10 MHz use Inputs 1 and 2 only 1 Input 1 2 Input 2 3 Monitor 3 4 Monitor 4 5...

Page 117: ...9 RJ45 3 4612 Outputs a Alarms terminal block TB1 1 Major Visual 1 2 Major Visual 2 3 Major Audible 1 4 Major Audible 2 5 Minor Visual 1 6 Minor Visual 2 7 Minor Audible 1 8 Minor Audible 2 9 Unused 1...

Page 118: ...2 Synchronization Monitor Card g Slot 7 for Model 54550 Information Management Card h Slot 8 for Model 54560 Alarm Interface Card i Slots 9 18 for Model 54571 to 54577 Output Driver Cards NOTE If the...

Page 119: ..._________________________________________________ CXR Larus 80 100 400 Issue 1 July 2006 page 3 85 This page is intentionally left blank...

Page 120: ...nterface Card d Selection of the input to be monitored by the 54541 or 54542 Synchronization Monitor Card e Monitoring of card outputs 4 21 Hold Mode Track and Hold Card Tests 4 2110 While in operatio...

Page 121: ...ation Management Card Normally the clock source is selected automatically on the basis of which clock is available first and which is not in alarm state 4 2211 The manual clock select mode is activate...

Page 122: ...CXR Larus 80 100 400 Issue 1 July 2006 _____________________________________________ page 4 3 Fig 4 1 StarClock 200E Clock Auto Selection State Diagram...

Page 123: ...t type to 2 048 MHz square wave Refer to Volume 3 for the TL1 ITL1 command set or Volume 4 for the menu interface 4 2411 The 54541 54542 powers up in a default mode scanning all equipped inputs for 10...

Page 124: ...the slot 2 54522 54523 Track and Hold Framed all ones if so configured at the clock output frequency 3 54591 GPS Track and Hold Framed all ones if so configured at the clock output frequency 4 54593...

Page 125: ...alarm to the local and remote craft interfaces If the failure is judged to be on the Information Management Card the alarm LED lights and the 54560 Alarm Interface Card is notified 4 3212 The 54550 I...

Page 126: ...rs 16 in 10 seconds Same 54541 54542 Synchronization Monitor Card Alarm Default Threshold Other Settable Threshold Loss of Signal LOS From T1 E1 receiver Out of Frame OOF Loss of frame LOF synchroniza...

Page 127: ...GPS Fail 10 seconds MTIE 1 5 x 10 8 or 1000 seconds MTIE 3 x 10 9 OR Degraded for twelve 10 second periods within 3 months OR Lost communications with GPS subassembly OR Still in GPS warm after 5 hou...

Page 128: ...___________________________________________________________________ ________ _____________________________________________ page 4 9 This page is intentionally left blank...

Page 129: ...horing output wiring cable bundles Model 54500 16 for E1 and Model 54500 17 for T1 shelves appear to be identical yet there are minor component value differences 5 21 Functions 5 2110 The backplane re...

Page 130: ...0 100 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 2 Fig 5 1 StarClock 200E System Model 54500 17...

Page 131: ...Reference Clock A BNC J21 BNC J21 connector gives an external 10 MHz signal for the A track and hold card 5 2214 External Reference Clock B BNC J22 BNC J22 connector gives an external 10 MHz for the...

Page 132: ...lf of the shelf The optional 54580 Network Time Server if present must be installed in card slot J18A 5 2222 GPS Antenna 1 J24 J24 is the connector to Global Positioning System GPS Antenna 1 The anten...

Page 133: ...to DS1 signals 1 544 MHz by clock adapters CLADs on the input card and the 54541 54542 Synchronization Monitor Card 5 3211 T1 E1 Receiver The T1 E1 receiver recovers the data and clock from the T1 E1...

Page 134: ...100 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 6 Figure 5 2 Model 54511 T1 or 54512 E1 2 048 MH...

Page 135: ...ED will be on In the event of a complete LOS the PULSES LED will be off The LOS condition results in a card alarm output on pin 44 to the 54560 Alarm Interface Card and to the 54550 Information Manage...

Page 136: ...y for composite clock 5 MHz or 10 MHz operation 5 41 Functions 5 4110 The Model 54513 Input Card performs the following functions a In conjunction with circuitry on the backplane provides terminating...

Page 137: ...tracked c The green PULSES LED is on if the PLL oscillator is in working condition d The yellow INPUT FAULT LED indicates an internal fault e The red LOS LED indicates either a loss of signal more tha...

Page 138: ...______________________________________________________________ ____________________________________________________________ 5 10 Figure 5 3 Model 54513 Input Card select which input s recovered clock...

Page 139: ...support the same input architecture either AA or AB See Appendix A 5 51 Functions 5 5110 The Model 54522 clock card performs the following functions a Accepts one of two 1 544 MHz clock signals and p...

Page 140: ...ut reference clock signal via the backplane connector The 54522 can select Input B to be from Input Card A by activating the INPSEL output line a For the AB input architecture the primary reference fo...

Page 141: ..._____________________________________________________________ __________________________________________________________ 5 13 Figure 5 4 Model 54522 Stratum 3E LNC Track and Hold Clock Card...

Page 142: ...ts or a CS2181 Transceiver Chip for the E1 inputs The framing circuit detects the following framing errors a Yellow Alarm LOS 175 75 consecutive zeros b BPVs c Invalid CRC6 codes ESF framing only or C...

Page 143: ...mpared with the phase of the recovered input reference clock by means of a pair of counters and latches good signal or bad a When the input signal is deemed good the microcontroller tracks the input p...

Page 144: ...card slots Each card also drives a hold indicator bus Selection of the A or B clock is done automatically by logic circuitry on the output cards it can be changed manually from a terminal connected to...

Page 145: ...current SSM status to the terminal interface For the 54522 it is Stratum 3 If the active clock card receives an SSM that is lower than its own stratum level it will treat the case as LOS If there is...

Page 146: ...V at 100 mA 5 6 Model 54523 Stratum 2 TNC Track and Hold Clock Card 5 6010 There are two 54523 track and hold cards in a redundant Stratum 2 TNC Transit Node Clock system The 54523 3 supports the AB i...

Page 147: ...ement Card and 54560 Alarm Interface Card e Facilitates synchronization status messaging per Bellcore GR 378 DS1 E1 only 5 62 Circuit Description Refer to the block diagram in Figure 5 5 in the follow...

Page 148: ...__________________________________ ____________________________________________________________ 5 20 5 6212 DS1 E1 Receiver The DS1 E1 receiver regenerates the selected incoming signals and recovers b...

Page 149: ..._____________________________________________________________ __________________________________________________________ 5 21 Figure 5 5 Model 54523 Stratum 2 TNC Track and Hold Clock Card...

Page 150: ...ble degree of precision e g within one part in 10 9 The DDFS uses a digital process to convert the oscillator signal into a signal having a second related frequency The DDFS accomplishes this conversi...

Page 151: ...quency 5 6217 Controls and Indicators The following controls and indicators appear on the front panel of the 54523 card a The red FAIL LED indicates an internal FUSE has blown the power supply is not...

Page 152: ...ll stay on it until the user issues a different command If the signal is bad during external signal tracking the clock card will enter the HOLD mode until the signal recovers However the clock card wi...

Page 153: ...An on card power converter provides the necessary circuit voltages from the diode combined A and B 48 volt battery supplies The on card fuse if it blows lights the red FAIL LED and provides battery to...

Page 154: ...ent to the DDFS is then calculated by taking the last long term average of the control values adding the latest successive average of the control value and the correction times the damping value less...

Page 155: ...receiver fails monitors the DS1 E1 reference signal for framing CRC and out of specification errors An out of specification input signal forces the card to hold to the last known reference with a dri...

Page 156: ...80 100 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 28 Figure 5 6 Model 54591 54593 Card GPS Mode...

Page 157: ...t to the GPS signal The microcontroller reads the error from the GPS receiver and provides a correction to the DDFS setting b DS1 E1 Input The 54591 card gets its clock from the 54511 or 54512 Input C...

Page 158: ...0 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 30 Figure 5 7 Model 54591 GPS Stratum 1 with Strat...

Page 159: ...signals from any other Stratum 3 LNC or higher source i e Stratum 2 TNC or 1 PRC having a frequency offset of no more than 7 1 Hz 5 8222 Framer The 54591 communicates with a CS2180 Transceiver Chip fo...

Page 160: ...s piece wise linear since normal and ACQUIRE 2 can alternate 5 8225 Controls and Latches The output phase is compared with the phase of the recovered input reference clock by means of a pair of counte...

Page 161: ...ell as control personality and with DS1 only sync messaging data 5 8230 Clocks A and B Each of the two 54591 cards in a redundant system drives a Clock A or B differential clock bus to the ten output...

Page 162: ...1 A GPS signal is considered a PRS so if the clock card is tracking a GPS input the clock will send out a PRS SSM If the active clock card receives an SSM that is lower than its own stratum level it w...

Page 163: ...n are collected and averaged over about a seven second period to provide input to the control algorithm If at any point in the accumulation and calculation period a condition is detected excessive err...

Page 164: ...sts of two 64K blocks of memory one each for program and data 5 9211 Inputs a GPS Receiver The 54593 card supplies the GPS receiver with the 1 544 MHz reference The receiver determines the error in th...

Page 165: ...__________________________________________________________ __________________________________________________________ 5 37 Figure 5 8 Model 54593 GPS Stratum 1 Track and Hold Card with Stratum 2 Holdo...

Page 166: ...rors a Yellow Alarm LOS 175 75 consecutive zeros b BPVs c Invalid CRC6 codes ESF framing only or CRC4 codes CRC4 framing only An impaired signal causes the microcontroller to cease tracking go into th...

Page 167: ...output phase is compared with the phase of the recovered input reference clock by means of a pair of counters and latches good signal or bad a When the input signal is deemed good the microcontroller...

Page 168: ...essaging data 5 9219 Clocks A and B Each of the two 54593 cards in a redundant system drives a Clock A or B differential clock bus to the ten output card slots Each card also drives a hold indicator b...

Page 169: ...the clock card is tracking a GPS input the clock will send out a PRS SSM If the active clock card receives an SSM that is lower than its own stratum level it will treat the case as LOS If there is no...

Page 170: ...IE bit and frame slips peak to peak wideband jitter above 10 Hz and peak to peak wander over the selected observation interval TIE MTIE and wander are calculated from phase data processed through a 10...

Page 171: ...choices are primary secondary and one of three external inputs 5 1022 Dual DS1 E1 Receiver Clock Adapter The dual DS1 E1 receiver recovers clock and data from the selected inputs after 20 dB amplifier...

Page 172: ...80 100 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 44 Figure 5 9 Model 54541 54542 Synchronizati...

Page 173: ...5 nanosecond resolution over 8 UI An up down overflow or unit interval counter extends this range to 256 x 8 UI or 2048 UI a total range of 2 6 milliseconds or 20 frames The hardware phase sampling r...

Page 174: ...ected either manually by the front panel MON SELECT button or by automatic scan at user controlled intervals through the 54550 card The selected input number appears on the seven segment display and i...

Page 175: ...iefly shows the new input being monitored when the input is changed otherwise the display shows the bit slip between the A B input clocks k The MON SELECT pushbutton is used for manually selecting eac...

Page 176: ...o send unsolicited information to the 54550 card 5 1102 The 54550 Information Management Card is provisioned at the factory in the following configurations a 54550 0 supports the AA input architecture...

Page 177: ...card The 54550 card uses the MC68332 which is a highly integrated 32 bit microcontroller MCU combining high performance data manipulation capabilities with powerful peripheral subsystems The MCU is bu...

Page 178: ...m access memory of 512 kbytes on the card provides storage of alarm and performance data obtained from the SMC The 54550 contains a DS1646 128K x 8 nonvolatile timekeeping RAM 5 1127 Clock Select Data...

Page 179: ..._____________________________________________________________ __________________________________________________________ 5 51 Figure 5 10 Model 54550 Information Management Card...

Page 180: ...erial peripheral interface QSPI of the queued serial module to communicate with the input alarm and output cards 5 1131 Local Area Network Controller for Ethernet 10 Base T The 54550 Information Manag...

Page 181: ...1201 The STS 54500 system allows for one Alarm Interface Card This card receives alarm information from all the other cards 5 121 Functions 5 1211 The Model 54560 Alarm Interface Card performs the fo...

Page 182: ...arm PULSE output equals a Major alarm 5 1222 Controls and Indicators The following controls and indicators appear on the front panel of the card a The red FAIL LED lights if the on card fuse blows or...

Page 183: ..._____________________________________________________________ __________________________________________________________ 5 55 connecting to pin 10 on the backplane terminal strip TB1...

Page 184: ...rus 80 100 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 56 Figure 5 11 Model 54560 Alarm Interfac...

Page 185: ...ail Major alarm state c The first output card from the left any slot acting as a master selector and all other output cards slaved to it to ensure that all output cards select the same clock reference...

Page 186: ...g input either A or B is selected d The yellow OVERRIDE LED lights when automatic selection has been overridden by manual remote selection e The red OUTPUT LOSS LED lights when a loss of one or more o...

Page 187: ..._____________________________________________________________ __________________________________________________________ 5 59 Figure 5 12 Model 54571 T1 Output Driver Card...

Page 188: ...rence input in the event that both track and hold cards fail Major alarm state c The first output card from the left any slot acting as a master selector and all other output cards slaved to it to ens...

Page 189: ...the on card fuse blows b The green CLOCK A B LED lights when the corresponding clock either A or B is selected c The yellow INPUT A B LED lights when the corresponding input either A or B is selected...

Page 190: ...puts are suppressed f The front panel MON jack allows for monitoring one of the output signals with a standard monitoring test set The Model 54572 has ten outputs with independent drivers g On card ju...

Page 191: ..._________________________________________________________ __________________________________________________________ 5 63 Note twenty outputs now Figure 5 13 Model 54572 Composite Clock Output Driver...

Page 192: ...B track and hold cards The current tracking card or if both are in HOLD the last track and hold card to go into the HOLD state is selected Switching is nonrevertive to minimize the number of phase dis...

Page 193: ...hase buildout circuit whose function is to smooth out sudden phase changes which might be as much as 1 2 a unit interval occurring when the clock selection is changed The change of phase rate is limit...

Page 194: ...0 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 66 Note twenty outputs now Figure 5 14 Model 54573...

Page 195: ...____________________________________________________________ __________________________________________________________ 5 67 NOTE twenty outputs now Figure 5 15 Model 54574 2 048 MHz RS 422 Output Car...

Page 196: ...one or more outputs occurs If both A and B clocks and both input references fail leaving no valid signal for the output cards to select the OUTPUT LOSS LED lights and all outputs are suppressed f The...

Page 197: ...ion Management Card allowing for manual clock selection and for automatic switching directly to a reference input in the event that both track and hold cards fail Major alarm state c The first output...

Page 198: ...lights when a loss of one or more outputs occurs If both A and B clocks and both input references fail leaving no valid signal for the output cards to select the OUTPUT LOSS LED lights and all outputs...

Page 199: ..._____________________________________________________________ __________________________________________________________ 5 71 Figure 5 16 Model 54575 RS 422 Output Driver Card...

Page 200: ...o a reference input in the event that both track and hold cards fail Major alarm state c Synchronization bus not required However when installed in the master position the 54577 will generate the sync...

Page 201: ...n automatic selection has been overridden by manual remote selection e The red OUTPUT LOSS LED lights when a loss of one or more outputs occurs If both A and B clocks and both input references fail le...

Page 202: ...80 100 400 Issue 1 July 2006 ______________________________________________________________ ____________________________________________________________ 5 74 Figure 5 17 Model 54577 5 10 MHz Output Dr...

Page 203: ...of the first card to Ring of the second card and this is for all of the twenty outputs that need this redundancy function enabled probably all twenty a The first card of a protected pair to be inserte...

Page 204: ...the decision to take timing on port A or port B This can be done with any 10 output card type or with any 20 output card type that has a jumper set for Non protected operation g The third illustratio...

Page 205: ...__________________________________________________________ 5 77...

Page 206: ...l 6 11 12 27 28 Output signal 7 13 14 29 30 Output signal 8 15 16 31 32 Output signal 9 17 18 33 34 Output signal 10 19 20 In the StarClock 100 system typical output cards bore 10 output signals per c...

Page 207: ...on a wirewrap pin field of 20 output capacity Basically of the 20 pairs of tip and ring wirewrap pins on the shelf pins 1 16 are unused and pins 37 40 are unused The ten output signals begin on pins 1...

Page 208: ...y in San Jose California unless stipulated differently under contract It is the purchaser s responsibility to return at its expense the allegedly defective product to CXR Larus The purchaser must obta...

Page 209: ...s disclaims all warranties on products furnished hereunder including without limitation all implied warranties of merchantability and fitness and the stated express warranties are in lieu of all oblig...

Page 210: ...e first track and hold assembly to power up and produce timing pulses will be the initial active timing source for the 2 output driver cards so all these output cards will utilize the same reference s...

Page 211: ...y the output cards If there is a failure of Input 1 Input Track and Hold A goes into holdover mode and checks whether the secondary input signal is good If it is Input Track and Hold A switches to tra...

Page 212: ...Larus 80 100 400 Issue 1 July 2006 A 3 Figure A 1 StarClock 200E AA Clock Architecture Figure A 2 StarClock 200E AB Clock Architecture AB is universally used in North America...

Page 213: ...ted via the backplane to allow each track and hold to monitor the other one The phase alignment feature causes the secondary card to continually attempt to align its phase with the primary card The re...

Page 214: ...AB 2 This page is intentionally left blank...

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