Commissioning
EL5101, EL5101-0010, EL5101-0011
128
Version: 4.2
Index F000 Modular device profile
Index (hex) Name
Meaning
Data type
Flags
Default
F000:0
Modular device profile General information for the modular device profile
UINT8
RO
0x02 (2
dec
)
F000:01
Module index distance Index spacing of the objects of the individual channels UINT16
RO
0x0010 (16
dec
)
F000:02
Maximum number of
modules
Number of channels
UINT16
RO
0x0002 (2
dec
)
Index F008 Code word
Index (hex) Name
Meaning
Data type
Flags
Default
F008:0
Code word
reserved
UINT32
RW
0x00000000
(0
dec
)
6.4.1.3
Control and status byte
Control byte
The control byte (CB) is located in the output process image, and is transmitted from the controller to the
terminal.
Bit
CB.7
CB.6
CB.5
CB.4
CB.3
CB.2
CB.1
CB.0
Name
-
-
-
-
EN_LATCH_EX
TN
CNT_SET
EN_LATCH_EXTP
EN_LATC
Table 1: Legend
Bit
Name
Description
CB.3
EN_LATCH_EXTN
1
bin
With a valid EN_LATCH_EXTN bit the counter value is stored in latch input (index
0x6000:03 [
}
124]
) when the first external latch pulse with falling edge is encoun-
tered. Subsequent pulses have no influence on the latch value. Please note: A
new counter value can only be written to the latch input when the Latch Valid bit
(LAT_EXT_VAL) in the status byte has a low signal level.
CB.2
CNT_SET
rise
The counter is set with rising edge of CNT_SET to the value specified via the
process data (index
0x7000:02 [
}
125]
).
CB.1
EN_LATCH_EXTP
1
bin
With a valid EN_LATCH_EXTP bit the counter value is stored in latch input (index
0x6000:03 [
}
124]
) when the first external latch pulse with rising edge is encoun-
tered. Subsequent pulses have no influence on the latch value. Please note: A
new counter value can only be written to the latch input when the Latch Valid bit
(LAT_EXT_VAL) in the status byte has a low signal level.
CB.0
EN_LATC
1
bin
The null point latch (C input) is activated. The counter value is saved when the first
external latch pulse after a valid EN_LATC bit encountered (this has priority over
EN_LAT_EXTN / EN_LAT_EXTP). If the bit is set subsequent pulses have no in-
fluence on the latch value. Please note: A new counter value can only be written to
the latch input when the Latch Valid bit (LATC_VAL) in the status byte has a low
signal level (the LATC_VAL bit (SB.0) is only cleared by the terminal when the C
pulse = LOW).
Status byte
The status byte (SB) is located in the input process image, and is transmitted from terminal to the controller.
Bit
SB.7
SB.6
SB.5
SB.4
SB.3
SB.2
SB.1
SB.0
Name
-
-
STA-
TUS_IN-
PUT
OVER-
FLOW
UNDERFLOW
CNTSET_AC
C
LAT_EXT_VAL
LATC_VAL
Summary of Contents for EL5101
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