5–73
CRC (Cyclical Redundancy Check) is calculated by the following steps:
Step 1: Load a 16-bit register (called CRC register) with FFFFH.
Step 2: Exclusive OR the first 8-bit byte of the command message with the low order
byte of the 16-bit CRC register, putting the result in the CRC register.
Step 3: Shift the CRC register one bit to the right with MSB zero filling. Extract and
examine the LSB.
Step 4: If the LSB of CRC register is 0, repeat step 3; else Exclusive OR the CRC
register with the polynomial value A001H.
Step 5: Repeat step 3 and 4 until eight shifts have been performed. When this is
done, a complete 8-bit byte will have been processed.
Step 6: Repeat steps 2 to 5 for the next 8-bit byte of the command message.
Continue doing this until all bytes have been processed. The final contents of the
CRC register are the CRC value.
The following is an example of CRC generation using C language. The function
takes two arguments:
Unsigned char* data
←
a pointer to the message buffer
Unsigned char length
←
the quantity of bytes in the message buffer
The function returns the CRC value as a type of unsigned integer.
Unsigned int crc_chk(unsigned char* data, unsigned char length){
int j;
unsigned int reg_crc=0xFFFF;
while(length--){
reg_crc ^= *data++;
for(j=0;j<8;j++){
if(reg_crc & 0x01){ /* LSB(b0)=1 */
reg_crc=(reg_crc>>1) ^ 0xA001;
}else{
reg_crc=reg_crc >>1;
}
}
}
return reg_crc;
}
RTU mode is preferred. Limited support is available to ASCII users.
When transmitting the CRC value in the message, the upper and lower bytes of the
CRC value must be swapped, i.e. the lower order byte will be transmitted first.
Chapter 5:
DURA
PULSE
MODBUS Communications
DURA
PULSE
AC Drive User Manual
1st Ed. Rev. D 05/2013
Summary of Contents for DURAPULSE GS3-2010
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