Artesyn BajaPPC-750, User Manual

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6-20 BajaPPC-750: VMEbus Interface
May 2002
/*VSI0_TO = Translation offset into local PCI space*/
universeIO->VSI0_TO = ES((int)VME_PCI_MEM_TRANS_OFF & 0xFFFFF000);
/*Window attributes*/
universeIO->VSI0_CTL = ES((int)(UNIV_VSIX_CTL_EN |
UNIV_VSIX_CTL_PGM_DATA |
UNIV_VSIX_CTL_SUPER_SUPER |
UNIV_VSIX_CTL_LD32EN | /*local PCI is
32 bits wide*/
UNIV_VSIX_CTL_VAS_A32 |
UNIV_VSIX_CTL_LAS_PCIMEM));
return;
}
6.5 VMEbus Interrupts
The Universe interrupt channel allows interrupts to be mapped either to the PCI
bus or VMEbus interface. The VMEbus interrupts are generated on pins VIRQ#[7-
1]. The following table identifies various interrupt sources and related Universe
registers.
The Universe also allows for each of the seven interrupt request levels to be gen-
erated simply by writing to the appropriate field in the VME Interrupt Enable
Register, VINT_EN, at hex offset 310
16
.
Table 6-4. Universe VMEbus Interrupt Sources
Interrupt Source Bit Enabled in Mapped in Status in
VME software interrupt SW_INT
VINT_EN
register
VINT_MAP0
or
VINT_MAP1
registers
VINT_STAT
register
VMEbus error VERR
PCI bus error LERR
DMA event DMA
PCI bus interrupt input LINT7-0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
VME_
SW7
VME_
SW6
VME_
SW5
VME_
SW4
VME_
SW3
VME_
SW2
VME_
SW1
Reserved
MBOX
3
MBOX
2
MBOX
1
MBOX
0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
VME_
SW_INT
Rsvd.
VME_
VERR
VME_
LERR
VME_
DMA
LINT7 LINT6 LINT5 LINT4 LINT3 LINT2 LINT1 LINT0
Register Map 6-8. Universe VME Interrupt Enable, VINT_EN