Parallel Port (Optional)
8-17
The parallel port Control Register bits are defined as follows:
PE
Paper End. Read by CPU as bit 5 of Printer Status Register.
0 = paper is loaded, 1 = paper end detected
SLCT
Printer Selected Status. Read by CPU as bit 4 of Printer Status Register.
0 = not selected, 1 = selected
nERR
Error. Read by CPU as bit 3 of Printer Status Register.
0 = error detected, 1 = no error detected
TMOUT
Time Out. Valid only in EPP mode.
0 = no time-out error, 1 = time-out error detected
7
6
5
4
3
2
1
0
0
0
PCD
IRQE
SLCTIN
nINIT
AUTOFD
STROBE
Register Map 8-9. Ultra I/O Parallel Port Control
PCD
Parallel Control Direction. Only valid in EPP or ECP mode.
0 = output mode (write), 1 = input mode (read)
IRQE
Interrupt Request Enable.
0 = enabled, 1 = disabled
SLCTIN
Printer Select Input. Inverted and output onto the nSLCTIN output.
0 = printer not selected, 1 = printer selected
nINIT
Initiate Output. Output onto the nINIT output (not inverted).
AUTOFD
Autofeed. Inverted and output onto the nAUTOFD output.
0 = no autofeed, 1 = generate automatic line feed after printing a line
STROBE
Strobe. Inverted and output onto the nSTROBE output.
Summary of Contents for BajaPPC-750
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Page 57: ...3 12 BajaPPC 750 Central Processing Unit May 2002...
Page 77: ...5 12 BajaPPC 750 PMC PCI Interface May 2002...
Page 111: ...6 34 BajaPPC 750 VMEbus Interface May 2002...
Page 135: ...8 18 BajaPPC 750 Serial and Parallel I O May 2002...
Page 207: ...10 68 BajaPPC 750 Monitor May 2002...