Artesyn BajaPPC-750, User Manual

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Semaphores 6-25
0002M621-15
The interrupt mapping register, LINT_MAP2 at offset 340
16
defines the location
monitor interrupt destinations. For example, writing a value of 000
2
to
LINT_MAP2, bits [18:16], maps the corresponding interrupt source for LM0 to
LINT[0]; writing a value of 001
2
to the same location maps the source to LINT[1];
writing 010
2
maps to LINT[2], and so on.
The status register, LINT_STAT at offset 304
16
, may be read to determine if a spe-
cific location monitor interrupt is active (1=active, 0=inactive). Writing a one
clears the status bit.
NOTE. The Universe chip does not terminate the cycle with DTACK* unless
initiated by another Universe.
6.11 Semaphores
The Universe provides facilities for up to eight semaphores, which allow
improved access to system resources. The semaphores each consist of a status bit
and seven tag bits. Two semaphore registers, SEMA0 at hex offset 358
16
and
SEMA1 at hex offset 35C
16
, each contain status and tag bits for four semaphores.
The status bits power-up with a logic 0. A process can write a one to the status bit
and a unique pattern to the tag field of a specific semaphore. During subsequent
byte-wide reads by the process, it will be granted ownership of the resource if the
pattern matches the semaphore tag field. The owning process then can write a
zero to the status bit to release the resource.
6.12 VMEbus Control Signals
VMEbus pins are defined on P1 and P2. Refer to the ANSI/VITA 1-1994 VME64
Standard for detailed usage of these signals. All signals are bidirectional unless
otherwise stated. Refer to
Universe User Manual for a complete listing of the pins.
The following signals on connectors P1 and P2 are used for the VMEbus interface.
A01-A15 ADDRESS bus (bits 1-15). Three-state address lines that are used for short,
standard, and extended addresses, and D64 block transfers.
A16-A23 ADDRESS bus (bits 16-23). Three-state address lines that are used for
standard and extended addresses, and D64 block transfers.
A24-A31 ADDRESS bus (bits 24-31). Three-state address lines that are used for
extended addresses and D64 block transfers.
ACFAIL* AC FAILURE. An open-collector signal which is an input to the BajaPPC-
750 and may be used to generate an interrupt to the CPU by program-
ming the Universe accordingly.