Artesyn BajaPPC-750, User Manual

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Index-6 BajaPPC-750: Index
module installation 5-3, 10-45
overview 5-1
pin assignments, J1x 5-10
pin assignments, J2x 5-11
single-width module 5-2
power requirements 2-15
power-up
errors 10-46
monitor sequence 10-5
power-up diagnostics 10-1
cache test 10-35
counter/timer test 10-34
Ethernet test 10-34
NVRAM test 10-35
PASS/FAIL flags 10-7
serial test 10-35
precautions 2-14
product code, Ethernet 7-3
programmable timers 9-1
R
radix, terminology 1-7
real-time clock 4-6
configuration registers 4-7
records
data 10-38, 10-41
data count 10-41
end-of-file 10-39
extended address 10-38
start address 10-39
termination and start address 10-42
user defined 10-40
references, manuals, and data books 1-7
register monitor commands 10-18
reset
counter/timer 9-4
methods 2-16
monitor sequence 10-5
switch 2-13
return merchandise authorization (RMA) 2-18
returning the board to Artesyn 2-18
S
screen messages 10-46
SDRAM. See DRAM.
semaphores 6-25
serial I/O
control from the monitor 10-63
serial number
circuit board 2-12
operating system 2-12
user ROM 2-12
serial ports 8-1
handshaking jumper 8-15
pin assignments 8-13
SERR* 5-9
service 2-18
setup
CRT terminal 2-16
requirements 2-14
seven-segment display 2-13
short address, VME 6-25
signal descriptions, PCI
bus command 5-8
BUSMODE1*-4* 5-8
byte enables 5-8
clock 5-8
cycle frame 5-9
device select 5-8
grant 5-9
initialization device select 5-9
initiator ready 5-9
interrupts 5-9
lock 5-9
parity 5-9
parity error 5-9
request 5-9
reset 5-9
stop 5-9
systems error 5-9
target ready 5-9
signal descriptions, VME
+5V STDBY 6-28
AC failure 6-25
address modifier 6-26
address strobe 6-26
bus busy 6-26
bus clear 6-26
bus error 6-26
bus grant 6-26
bus request 6-26
data bus 6-26
data strobe 6-26
data transfer acknowledge 6-26
interrupt acknowledge 6-27
interrupt request 6-27
long word 6-27
read/write 6-28
system clock 6-27
system fail 6-27
system reset 6-27