Anritsu MG3702xA Series, Maintenance Manual, Page: 32 / 184

2-3 Frequency Synthesis Chapter 2 — Functional Description
2-8 PN: 10370-10372 Rev. B MG3702xA MM
1. With no external reference attached, the oscillator frequency is set by the Reference Tuning DAC,
the value of which is determined by a calibration procedure and stored in the onboard flash
memory.
2. If an external 10 MHz is detected, the loop will attempt to lock to this signal.
3. A voltage applied to the external VCO Tune line (EFC J5) will directly bias the VCO. Note that if
an external reference is also attached, the loop will work against the VCO Tune line, and the only
effect this line will have is to send the loop out of lock.
The output of the 100 MHz reference is directed to the 100 MHz Reference Select module, which has the
ability to automatically connect to an external 100 MHz source. If option 036 (100 MHz External
Reference Loop) is installed, a 100 MHz output is provided on J4. If a 100 MHz signal is detected on J3,
the module will automatically use this signal as the reference to the coarse loop and fine loop multiplier
chains.
Coarse Loop
The coarse loop section provides coarse frequency steps on the output of the fast switching frequency
synthesizer.
The first part of the coarse loop (which is not actually a phase-locked loop) takes the 100MHz from the
reference section and generates 900MHz from it. This is accomplished by frequency tripling two times.
Each tripler is followed by a narrowband bandpass filter which removes the second, fourth, and other
unwanted harmonics but allows the desired third harmonic to pass. This 900MHz output from the A-loop
must be as spurious-free and as noise-free as possible because it can degrade the performance of the
coarse loop module.
The 100 MHz output is multiplied by a factor of 3 to create the 300MHz used by the A9 board. The 300
MHz is again multiplied by a factor of 3 to create the 900MHz used by the coarse loop and is routed to
two paths:
• Path 1: Part of the 900 MHz (not actually a phase-locked loop) is multiplied by a factor of 2 to
create the 1800 MHz and then multiplied by a factor of 2 to create the 3600 MHz which is routed to
the PLL.
• Path 2: Part of the 900 MHz is sent to the mixer. The result from the mixer and the 800 to 1000
MHz VCO output is fed back to the PLL.
The signals from these two paths lock the PLL and 800 to 1000 MHz VCO to the programmed coarse
frequency. The goal is to provide a very fast switching loop. A PLL IC is part of this loop which locks the
800 to 1000 MHz VCO from 820 to 870 MHz and 930 to 980 MHz. The coarse output is then divided by 4
and sent to the A9 PCB via J1 connector at a frequency range of 202.5 to 217.5 or 232 to 247.2 MHz.
A9 PCB
The A9 VCO Output / Fine loop module provides phase and frequency locking to the VCO from 2.5 to 4 GHz
and then multiplies and divides this signal to synthesize any frequency from 2 to 20 GHz. This module also
holds the Fine loop for fine frequency control.
The A9 VCO Output / Fine loop module contains all the necessary circuitry to lock the 2.5 to 4 GHz VCO to a
comb-line of the coarse loop. This is accomplished by the following steps:
1. Frequency Acquisition: before handing over control, the VCO is steered to the closest 10 MHz by the
Steering loop. Once this has happened, the main loop is closed, allowing the down-sampled VCO
frequency to be phase locked to the Fine Loop. As a result, the steering loop will now be unlocked.
2. The Fine Loop is a Direct Digital Synthesizer used to generate frequencies between 30 and 40 MHz. This
is fed into the PFD (Phase Frequency Detector).
3. The output of the VCO is sent to the sampler which combines it to the coarse loop and feeds it into the
PFD which locks the frequency.
The output of the VCO is then routed to the Multiplier Chain which multiplies the frequency to 2 to 20
GHz.