ADSP-2192 Peripheral Device Control Registers
B-46 ADSP-219x/2192 DSP Hardware Reference
AC’97 Codec Register Space, Secondary Codec 2
(AC97EXT2) Register
PCI DMA Address, Count Registers
The PCI DMA registers described in the following sections refer to the
Address generator block (shown in
) for PCI Bus
Mastering. Use these registers to specify general addressing information.
DMA Control Registers
These registers control bus mastering transactions.
PCI DMA Control Registers
All four PCI DMA control registers, listed below, share the same bit struc-
ture and bit descriptions. Refer to
“Setting I/O Processor—Host Port
for descriptions of the bits in these registers.
• DMA PCI Control/Status - PCI DMA Channel Control (
Rx0
) Reg-
ister
• DMA PCI Control/Status-Transmit (
Tx0
)
Table B-20. AC’97 External Codec Space 2 Registers
Register
Name
Description
PCI
Address
USB Address
DSP
I/O
Page
DSP
I/O
Address
AC97EXT2
AC’97 External
Codec Space 2.
External Second-
ary Codec 2 Reg-
ister
0x67F-0x600
0x067F-0x0600
0x06
0x7F-0x00
