Analog Devices ADSP-219 Series, Hardware Reference Manual

Page: 67 / 106

ADSP-219x/2192 DSP Hardware Reference B-67
ADSP-2192 DSP Peripheral Registers
Interaction Between Registers
Table B-31 on page B-67 and Table B-32 on page B-70 show the register
interactions between functions.
Table B-31. Configuration Space Register Interactions Between Functions
Name Comments
Vendor ID Separate registers, no interaction
Device ID Separate registers, no interaction
GROUP Description Bit Bit Function
Command
Register Bits I/O Space Enable 0 Enables are separate in each function
and go along with the function’s base
addresses
Memory Space
Enable 1 Enables are separate in each function
and go along with the function’s base
addresses
Bus Master Enable 2 Enables are separate in each function
and go along with the function’s base
addresses
Special Cycles 3 None of the functions support special
cycles, read-only
Memory Write &
Invalidate 4 No function generates Memory Write
and Invalidate commands, read-only
VGA Palette Snoop 5 Not applicable, read-only
Parity Error Response 6 If any function has the bit set,
PERR
may
be asserted
Stepping Control 7 No address stepping is done, read-only