ADSP-219x/2192 DSP Hardware Reference B-99
ADSP-2192 DSP Peripheral Registers
#define PWRP_GWE MK_BMSK_(PWRP_GWE_P ) // DSP Wake up on GPIO
// Input Enable
#define PWRP_PMWE MK_BMSK_(PWRP_PMWE_P ) // Power Management
// Wake up Enable
#define PWRP_RSTD MK_BMSK_(PWRP_RSTD_P ) // DSP Soft Reset
#define PWRP_PU MK_BMSK_(PWRP_PU_P ) // DSP Power Up
#define PWRP_PD MK_BMSK_(PWRP_PD_P ) // DSP Power Down
//**************************************************
// PLLCTL register
//**************************************************
// Bit Positions
#define PLLC_DPLLN1_P 11 // DSP PLL N Divisor Selects
#define PLLC_DPLLN0_P 10 // DSP PLL N Divisor Selects
#define PLLC_DPLLK1_P 9 // DSP PLL K Divisor Selects
#define PLLC_DPLLK0_P 8 // DSP PLL K Divisor Selects
#define PLLC_DPLLM3_P 7 // DSP PLL M Divisor Selects
#define PLLC_DPLLM2_P 6 // DSP PLL M Divisor Selects
#define PLLC_DPLLM1_P 5 // DSP PLL M Divisor Selects
#define PLLC_DPLLM0_P 4 // DSP PLL M Divisor Selects
#define PLLC_DADJ_P 0 // DSP PLL Adjust
// Bit Masks
#define PLLC_DPLLN1 MK_BMSK_(PLLC_DPLLN1_P) // DSP PLL N Divisor Selects
#define PLLC_DPLLN0 MK_BMSK_(PLLC_DPLLN0_P) // DSP PLL N Divisor Selects
#define PLLC_DPLLK1 MK_BMSK_(PLLC_DPLLK1_P) // DSP PLL K Divisor Selects
#define PLLC_DPLLK0 MK_BMSK_(PLLC_DPLLK0_P) // DSP PLL K Divisor Selects
#define PLLC_DPLLM3 MK_BMSK_(PLLC_DPLLM3_P) // DSP PLL M Divisor Selects
#define PLLC_DPLLM2 MK_BMSK_(PLLC_DPLLM2_P) // DSP PLL M Divisor Selects
#define PLLC_DPLLM1 MK_BMSK_(PLLC_DPLLM1_P) // DSP PLL M Divisor Selects
#define PLLC_DPLLM0 MK_BMSK_(PLLC_DPLLM0_P) // DSP PLL M Divisor Selects
#define PLLC_DADJ MK_BMSK_(PLLC_DADJ_P) // DSP PLL Adjust
//**************************************************
// PWRCFGx register
//**************************************************
// Bit Positions
#define PWRC_SPME_P 14 // Power Management Event Set
#define PWRC_GPME_P 6 // GPIO Power Management Event Enable
#define PWRC_PWRST1_P 1 // PCI Function Power State
#define PWRC_PWRST0_P 0 // PCI Function Power State
