ADSP-219x/2192 DSP Hardware Reference B-69
ADSP-2192 DSP Peripheral Registers
Revision ID
Read-only
Class Code
Separate registers, no interaction
Cache Line Size
Read-only
Latency Timer
Separate for each function, no interac-
tion
Header Type
Read-only
Base Address 1
In range signal ORed between func-
tions, any function can access memory
Base Address 2
In range signal ORed between func-
tions, any function can access memory
Base Address 3
In range signal ORed between func-
tions, any function can access memory
Base Address 4
In range signal ORed between func-
tions, any function can access memory
Subsystem Vendor ID
Separate registers, no interaction
Subsystem Device ID
Separate registers, no interaction
Capabilities Pointer
Read-only
Interrupt Line
Separate registers, no interaction
Interrupt Pin
Read-only
Min_Gnt
Read-only.
Max_Lat
Read-only
Table B-31. Configuration Space Register Interactions Between Functions
(Continued)
Name
Comments