ADSP-2192 Peripheral Device Control Registers
B-38 ADSP-219x/2192 DSP Hardware Reference
CardBus Function Event Present State (CB_FPS0) Register
L
All bits in this register are reset to zero.
15
INTM
Interrupt / Wakeup Mask.
Enables assertion of
INTA
and
PME//CSTSCHG
when in Card-
Bus mode (
CBUS
= low). Has no effect upon
INTA
or
PME/CSTSCHG
when not in CardBus mode.
In CardBus mode:
INTA
is asserted when:
CB_FEM0:INTM=1
and
CB_FE0:INTR=1
.
CSTSCHG
is asserted high when:
CB_FEM0:INTRM=1
and
CB_FEM0:WKUP=1
and
CB_FEM0:GWKM=1
and
CB_FE0:GWKE=1.
This bit is cleared by power-on reset and
PCI
RST
. It is not affected by
SYSRST
or Soft Reset.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IN
T
R
Re
se
rv
ed
GW
AK
E
Re
se
rv
ed
Table B-14. CB_FPS0 Register Bit Descriptions
Bit Position
Bit Name
Description
3:0
Reserved
4
GWAKE
Current wakeup state.
This bit reflects the current state of the wakeup condi-
tion from either AC’97 or the local GPIOs, if enabled by
ACPU or GPU.
14:5
Reserved
Table B-13. CB_FEM0 Register Bit Descriptions (Continued)
Bit Position
Bit Name
Description
