Analog Devices ADSP-219 Series, Hardware Reference Manual

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ADSP-219x/2192 DSP Hardware Reference B-3
ADSP-2192 DSP Peripheral Registers
DSP Peripherals Architecture
Figure B-1 shows the DSP’s on-chip peripherals, which include the Host
port (PCI or USB), AC’97 port, JTAG test and emulation port, flags, and
interrupt controller.
Figure B-1. ADSP-2192 Dual-Core DSP Block Diagram
The ADSP-2192 can respond to up to fourteen interrupts at any given
time. A list of these interrupts can be found in the table
“Interrupt Vectors
for an ADSP-2192 DSP Core” on page 6-14 .
The AC’97 codec port on the ADSP-2192 provides a complete synchro-
nous, full-duplex serial interface. This interface completely supports the
AC’97 standard.
The ADSP-2192 provides up to eight general-purpose I/O pins, which are
programmable as either inputs or outputs. These pins are dedicated gen-
eral-purpose programmable flag pins.
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