SERIES IP511 INDUSTRIAL I/O PACK ISOLATED QUAD EIA/TIA-422B COMMUNICATION MODULE
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Note that some functions share the same register address. For
these items, the address lines are used along with the divisor latch
access bit (bit 7 of the Line Control Register) and/or the read and write
signals to determine the function required. The enhanced feature
registers of the Model IP511-64 are shaded in the table that follows and
only accessible after writing “BF” to the Line Control Register (LCR).
Table 3.1: IP511 I/O Space Address (Hex) Memory Map
Base
Addr+
MSB
D15 D08
LSB
D07 D00
LCR
Bit7
Base
Addr+
Serial Port A Registers:
00
Not Driven
1
READ - RBR
Port A Receiver
Buffer Register
0
01
00
Not Driven
1
WRITE - THR
Port A Transmitter
Holding Register
0
01
00
Not Driven
1
R/W - DLL
Port A Divisor Latch
LSB
1
01
02
Not Driven
1
R/W - IER
Port A Interrupt
Enable Register
0
03
02
Not Driven
1
R/W - DLM
Port A Divisor Latch
MSB
1
03
04
Not Driven
1
R/W - EFR
4
Port A Enhanced
Function Register
(“-64” models only)
1
05
08
Not Driven
1
R/W- XON-1 Word
Port A
SW Flow Control
4
1
09
0A
Not Driven
1
R/W- XON-2 Word
Port A
SW Flow Control
4
1
0B
0C
Not Driven
1
R/W- XOFF-1 Word
Port A
SW Flow Control
4
1
0D
0E
Not Driven
1
R/W- XOFF-2 Word
Port A
SW Flow Control
4
1
0F
Base
Addr+
MSB
D15 D08
LSB
D07 D00
Base
Addr+
04
Not Driven
1
READ - IIR
Port A Interrupt
Identification Register
05
04
Not Driven
1
WRITE - FCR
Port A FIFO Control
Register
05
06
Not Driven
1
R/W - LCR
Port A Line Control Register
07
08
Not Driven
1
R/W - MCR
Port A Modem Control
Register
09
0A
Not Driven
1
R/W - LSR
Port A Line Status Register
0B
0C
Not Driven
1
R/W - MSR
Port A Modem Status
Register
0D
0E
Not Driven
1
R/W - SCR
Port A Scratch Pad/Interrupt
Vector Register
0F
Shaded register entries apply to Model IP511-64 only and are
accessible after writing “BF” to the Line Control Register (LCR).
Table 3.1: IP511 I/O Space Address (Hex) Memory Map
Base
Addr+
MSB
D15 D08
LSB
D07 D00
LCR
Bit7
Base
Addr+
Serial Port B Registers:
10
Not Driven
1
READ - RBR
Port B Receiver
Buffer Register
0
11
10
Not Driven
1
WRITE - THR
Port B Transmitter
Holding Register
0
11
10
Not Driven
1
R/W - DLL
Port B Divisor Latch
LSB
1
11
12
Not Driven
1
R/W - IER
Port B Interrupt
Enable Register
0
13
12
Not Driven
1
R/W - DLM
Port B Divisor Latch
MSB
1
13
14
Not Driven
1
R/W - EFR
4
Port B Enhanced
Function Register
(“-64” models only)
1
15
18
Not Driven
1
R/W- XON-1 Word
Port B
SW Flow Control
4
1
19
1A
Not Driven
1
R/W- XON-2 Word
Port B
SW Flow Control
4
1
1B
1C
Not Driven
1
R/W- XOFF-1 Word
Port B
SW Flow Control
4
1
1D
1E
Not Driven
1
R/W- XOFF-2 Word
Port B
SW Flow Control
4
1
1F
Base
Addr+
MSB
D15 D08
LSB
D07 D00
Base
Addr+
14
Not Driven
1
READ - IIR
Port B Interrupt
Identification Register
15
14
Not Driven
1
WRITE - FCR
Port B FIFO Control
Register
15
16
Not Driven
1
R/W - LCR
Port B Line Control Register
17
18
Not Driven
1
R/W - MCR
Port B Modem Control
Register
19
1A
Not Driven
1
R/W - LSR
Port B Line Status Register
1B
1C
Not Driven
1
R/W - MSR
Port B Modem Status
Register
1D
1E
Not Driven
1
R/W - SCR
Port B Scratch Pad/Interrupt
Vector Register
1F
Shaded register entries apply to Model IP511-64 only and are
accessible after writing “BF” to the Line Control Register (LCR).
