SERIES IP511 INDUSTRIAL I/O PACK ISOLATED QUAD EIA/TIA-422B COMMUNICATION MODULE
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The chief application of EIA/TIA-422B is for multi-drop data
transmission on long busy lines in noisy environments. The same can
be said for EIA-485. However, EIA-485 implements half-duplex
networks (one combined transmit and receive data path), while EIA/TIA-
422B implements full-duplex networks (separate transmit and receive
data paths). Acromag offers both isolated and non-isolated models for
EIA/TIA-422B and EIA-485 (consult the factory for information on other
serial communication modules).
With respect to EIA/TIA-422B, logic states are represented by
differential voltages from 2V to 10V. The polarity of the differential
voltage determines the logical state. A logic 0 (the ‘space’ or ON state)
is represented by a negative differential voltage between the terminals
(measured A to B, or + to -). A logic 1 (the ‘mark’ or OFF state) is
represented by a positive differential voltage between the terminals
(measured A to B, or + to -). The line receivers convert the interface
signals to the conventional TTL level associations required by the
UART. The line drivers convert the TTL signals of the UART to the
differential voltages required at the interface (Refer to Drawing 4501-
584).
EIA/TIA-422B Interface Levels
EIA/TIA-422B
BINARY 0
(SPACE/ON)
BINARY 1
(MARK/OFF)
SIGNAL A to B
(+) to (-)
Negative
Differential Voltage
Positive
Differential Voltage
Start and stop bits are used to synchronize the receiver (DCE) to
the asynchronous serial data of the transmitter (DTE). The transmit
data line is normally held in the mark state (logical 1). The transmission
of a data byte requires that a start bit (a logical 0 or a transition from
mark to space) be sent first. This tells the receiver that the next bit is a
data bit. The data bits are followed by a stop bit (a logical 1 or a return
to the mark state). The stop bit tells the receiver that a complete byte
has been received. Thus, 10 bits make up a data byte if the data
character is 8 bits long (and no parity is assumed). Nine bits are
required if only standard ASCII data is being transmitted (1 start bit + 7
data bits + 1 stop bit). The character size for this module is
programmable from 5 to 8 bits.
Parity is a method of judging the integrity of the data. Odd, even, or
no parity may be configured for this module. If parity is selected, then
the parity bit precedes transmission of the stop bit. The parity bit is a 0
or 1 bit appended to the data to make the total number of 1 bits in a byte
even or odd. Parity is not normally used with 8-bit data. Even parity
specifies that an even number of logical 1’s be transmitted. Thus, if the
data byte has an odd number of 1’s, then the parity bit is set to 1 to
make the parity of the entire character even. Likewise, if the transmitted
data has an even number of 1’s, then the parity bit is set to 0 to maintain
even parity. Odd parity works the same way using an odd number of
logical 1’s. Thus, both the transmitter and receiver must have the same
parity. If a byte is received that has the wrong parity, an error is
assumed and the sending system is typically requested to retransmit
the byte. Two other parity formats not supported by this module are
mark parity and space parity. Mark parity specifies that the parity bit will
always be a logical 1, space parity requires the parity bit to always be 0.
The most common asynchronous serial data format is 1 start bit, 8
data bits, and 1 stop bit, with no parity. The following table summarizes
the available data formats:
Available Data Formats
START BIT
Binary 0 (a shift from “Mark” to “Space”)
DATA BITS
5,6,7, or 8 Bits
PARITY
Odd, Even, or None
STOP BIT
Binary 1 (1, 1-1/2, or 2 Bit times)
With start, stop, and parity in mind, for an asynchronous data byte,
note that at least one bit will be a 1 (the stop bit). This defines the break
signal (all 0 bits with a 1 stop bit lasting longer than one character). A
break signal is a transfer from “mark” to “space” that lasts longer than
the time it takes to transfer one character. Because the break signal
doesn’t contain any logical 1’s, it cannot be mistaken for data.
Typically, whenever a break signal is detected, the receiver will interpret
whatever follows as a command rather than data. The break signal is
used whenever normal signal processing must be interrupted. In the
case of a modem, it will usually precede a modem control command.
Do not confuse the break signal with the ASCII Null character, since a
break signal is longer than one character time. That is, it is any “space”
condition on the line that lasts longer than a single character (including
its framing bits) and is usually 1-1/2 to 2 character times long.
The baud rate is a unit of transmission speed equal to the number
of electrical signals (signal level changes) sent on a line in one second.
It is thus, the electrical signaling rate or frequency at which electrical
impulses are transmitted on a communication line. The baud rate is
commonly confused with the bit transfer rate (bits-per-second), but
baud rate does not equate to the number of bits transmitted per second
unless one bit is sent per electrical signal. However, one electrical
signal (change in signal level) may contain more than one bit (as is the
case with most phone modems). While bits-per-second (bps) refers to
the actual number of bits transmitted in one second, the baud rate
refers to the number of signal level changes that may occur in one
second. Thus, 2400 baud does not equal 2400 bits per second unless
1 bit is sent per electrical signal. Likewise, a 1200bps or 2400bps
modem operates at a signalling rate of only 600 baud since they encode
2 and 4 bits, respectively, in one electrical impulse (through amplitude,
phase, and frequency modulation techniques). However, for this
device, the baud rate is considered equivalent to the bit rate.
This model has separate data paths for Transmit and Receive,
providing full-duplex communication. No handshake signals are
supported. Pins 1-18 and pins 26-43 of the field I/O connector P2
provide connectivity to serial Ports A-D of this module (Refer to Table
2.1 for pin assignments). A suffix of ‘A’, ‘B’, ‘C’, or ‘D’, followed by plus
(+) or minus (-) is appended to the port signal names to indicate their
port association and signal polarity. The UART handshake input signal
lines not used by this module have their corresponding UART pins tied
high (+5V). This includes, RI (Ring Indication), DSR (Data Set Ready),
Clear-to-Send (CTS), and DCD (Data Carrier Detect). UART output
signals RTS and DTR are not connected. Port transmitters and
receivers are always enabled.
