Acromag IP511 Series User Manual Download Page 5

SERIES IP511 INDUSTRIAL I/O PACK                ISOLATED QUAD EIA/TIA-422B COMMUNICATION MODULE
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Threaded metric M2 screws and spacers are supplied with the module
to provide additional stability for harsh environments (see Mechanical
Assembly Drawing 4501-434).  The field and logic side connectors are
keyed to avoid incorrect assembly.  P2 pin assignments are unique to
each IP model (see Table 2.1) and normally correspond to the pin
numbers of the field I/O interface connector on the carrier board (you
should verify this for your carrier board).

Table 2.1:  IP511 Field I/O Pin Connections (P2)

Pin Description

Number

Pin Description

Number

COMMON A

1

COMMON C

26

+5V INPUT A

2

+5V INPUT C

27

TxDA+

3

TxDC+

28

+5V INPUT A

4

+5V INPUT C

29

TxDA-

5

TxDC-

30

+5V INPUT A

6

+5V INPUT C

31

RxDA-

7

RxDC-

32

+5V INPUT A

8

+5V INPUT C

33

RxDA+

9

RxDC+

34

COMMON B

10

COMMON D

35

+5V INPUT B

11

+5V INPUT D

36

TxDB+

12

TxDD+

37

+5V INPUT B

13

+5V INPUT D

38

TxDB-

14

TxDD-

39

+5V INPUT B

15

+5V INPUT D

40

RxDB-

16

RxDD-

41

+5V INPUT B

17

+5V INPUT D

42

RxDB+

18

RxDD+

43

Not Used

19

Not Used

44

Not Used

20

Not Used

45

Not Used

21

Not Used

46

Not Used

22

Not Used

47

Not Used

23

Not Used

48

Not Used

24

Not Used

49

Not Used

25

Not Used

50

An Asterisk (*) is used to indicate an active-low signal.

Refer to Table 2.1 and note that the pin-wire assignments are

arranged such that IDC D-SUB ribbon cable connectors can be
conveniently attached to provide serial port A (pins 1-9), serial port B
(pins 10-18), serial port C (pins 26-34), & serial port D (pins 35-43)
connectivity.  Plus (+) and minus (-) following the signal name indicate
differential signal polarity.  In Table 2.1, a suffix of “A”, “B”,  “C”, or “D”
is appended to each pin label to denote its port association.  A brief
description of each of the serial port signals at P2 is included below.  A
complete functional description of the P2 pin functions is included in
Section 4.0 (Theory Of Operation).  Be careful not to confuse the A-D
port designations of the IP module with the IP carrier board A-D slot
designations.

Note that none of the handshake lines of the UART are used by

this model and their corresponding UART input pins are tied high
(+5V).  This includes, CTS (Clear-to-Send), RI (Ring Indicator), DCD
(Data Carrier Detect), and DSR (Data Set Ready).  The RTS (Request-
to-Send) and DTR (Data Terminal Ready) output signal paths are not
connected.  The port driver (transmit) and receivers are always enabled
on this model.

P2 Pin Signal Descriptions For Model IP511

SIGNAL 

±±±±

DESCRIPTION

TxDA

±

TxDB

±

TxDC

±

TxDD

±

Transmit Data Line Differential Output Path.  To
the communication network master, this line pair
is used as the transmit data path.  To the
communication network slave, this line pair
comprises the receive data path.  Because a
separate pair of lines are used for transit and
receive, full-duplex communication is implied.
During Loopback Mode, the TxD output of the
UART is internally connected to the RxD input
of the UART and disconnected from this data
path.

RxDA

±

RxDB

±

RxDC

±

RxDD

±

Receive Data Line Differential Input Path.  To
the communication network master, this line pair
is the receive data path.  To the communication
network slaves, this line comprises the transmit
data path.  Because a separate pair of lines are
used for transmit and receive, full-duplex
communication is implied.  During Loopback
Mode, the TxD output of the UART is internally
connected to the RxD input of the UART and
disconnected from this data path.

+5V INPUT A
+5V INPUT B
+5V INPUT C
+5V INPUT D

Is5V Port Power Input (four pin
connections per port).  For isolated operation, an
external isolated power supply must be
connected here to power the port.  If non-
isolated operation is acceptable, then the port
may be powered from the +5V logic supply of
the carrier by programming the port power and
ground jumpers accordingly (see Drawing 4501-
582).

COMMON A
COMMON B
COMMON C
COMMON D

Isolated Signal Common and +5V return.  For
isolated operation, the external isolated power
supply common must be connected here to
complete power to the port.  If non-isolated
operation is acceptable, then the port may be
powered from the logic common of the carrier by
programming the port power and ground
jumpers accordingly (see Drawing 4501-582).

Noise and Grounding Considerations

The serial ports of this module are isolated from the IP module’s

digital circuitry and from each other when external is5V power is
provided to the port.  As long as separate isolated supplies are used,
the ports will also be isolated from each other.  Otherwise, if the ports
share an isolated supply, they are isolated from the carrier, but not
isolated from each other.  Optionally, the IP modules own +5V supply
and common may be jumpered to each port for non-isolated operation
(in this mode, the channels share a common signal ground and +5V
connection).

If isolated port power is not provided to the port connector and the

power jumpers are connecting the IP +5V and common to power the
port, then the signal ground connection at the communication ports are
common to each other and the IP interface ground, which is typically
common to safety (chassis) ground when mounted on a carrier board
and inserted in a backplane.  As such, be careful not to attach signal
ground to safety ground in this mode via any device connected to these
ports, or a ground loop will be produced and this may adversely affect
operation.

Summary of Contents for IP511 Series

Page 1: ...tion Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 1996 Acromag Inc Printed in the USA Data and spe...

Page 2: ...ystem This is especially important where economic property loss or human life is involved It is important that the user employ satisfactory overall system design It is agreed between the Buyer and Acr...

Page 3: ...er Acromag IP modules are also available to serve your signal conditioning and interface needs Note Since all connections to field signals are made through the carrier board which passes them to the i...

Page 4: ...ive data paths This SIP can be easily removed or replaced if required see Drawing 4501 581 4501 582 Network Termination Bias Resistor Placement You need to consider your network application carefully...

Page 5: ...h To the communication network master this line pair is used as the transmit data path To the communication network slave this line pair comprises the receive data path Because a separate pair of line...

Page 6: ...ides excellent connection integrity and utilizes gold plating in the mating area Threaded metric M2 screws and spacers are supplied with the IP module to provide additional stability for harsh environ...

Page 7: ...Port A Line Control Register 07 08 Not Driven1 R W MCR Port A Modem Control Register 09 0A Not Driven1 R W LSR Port A Line Status Register 0B 0C Not Driven1 R W MSR Port A Modem Status Register 0D 0E...

Page 8: ...R W SCR Port C Scratch Pad Interrupt Vector Register 2F Shaded register entries apply to Model IP511 64 only and are accessible after writing BF to the Line Control Register LCR Table 3 1 IP511 I O Sp...

Page 9: ...g an invalid data character due to a low going noise spike on RxD If the data on RxD is a symmetrical square wave the center of the data cells will occur within 3 125 of the actual center providing an...

Page 10: ...extended register functionality of IER bits 4 7 IIR bits 4 5 FCR bits 4 5 and MCR bits 5 7 It is also used to program software flow control Note that bits 6 7 are used for hardware flow control but th...

Page 11: ...7 NO FUNCTION FOR MODEL IP511 0 Disable the CTS interrupt 1 Enable the generation of the CTS interrupt when CTS changes from a low to high state The IP511 does not implement the CTS line and this bit...

Page 12: ...FO TRIGGER LEVEL 00 01 Bytes 08 Bytes for IP511 64 Models 01 04 Bytes 16 Bytes for IP511 64 Models 10 08 Bytes 56 Bytes for IP511 64 Models 11 14 Bytes 60 Bytes for IP511 64 Models LCR Line Control Re...

Page 13: ...the selected serial channel In Loopback Mode interrupts are generated by controlling the state of the four lower order MCR bits internally instead of by the external hardware paths However no interru...

Page 14: ...errupt a priority 1 interrupt in the IIR register when any one of these conditions are detected This interrupt is enabled by setting IER bit 2 to 1 A power up or system reset sets all LSR bits to 0 ex...

Page 15: ...Low Interrupt Modem Status Changes Read MSR Reset Low OUT1 Reset High OUT2 Reset High After a power up the isolation buffer s output is initialized high As a result the very first bit transmitted or...

Page 16: ...the FIFO drops below its trigger level When the receiver FIFO and receiver interrupts are enabled the following receiver FIFO character time out status conditions apply 1 A FIFO character time out int...

Page 17: ...oo quickly to be processed or buffered thus preventing the loss of excess data The flow control characters are stored in the XON 1 2 and XOFF 1 2 registers Two XON XOFF registers are provided because...

Page 18: ...functionality of the circuitry used on the board is also included Refer to the Block Diagram Drawing 4501 583 Interface Diagram Drawing 4501 581 and Interface Level Diagram Drawing 4501 584 as you re...

Page 19: ...nsmit the byte Two other parity formats not supported by this module are mark parity and space parity Mark parity specifies that the parity bit will always be a logical 1 space parity requires the par...

Page 20: ...ed isolated only when isolated external port power is provided to the port Optionally the port may use P1 power by programming the power and common jumpers appropriately In this mode the port is consi...

Page 21: ...o RFI No data upsets occur for field strengths up to 10V per meter at 27MHz 151MHz 460MHz per SAMA PMC 33 1 test procedures Resistance to EMI Unit has been tested with no data upsets under the influen...

Page 22: ...performance with precision analog I O applications Application Used to connect a Model 5025 552 termination panel to the AVME9630 9660 non intelligent carrier board A D connectors both have 50 pin con...

Page 23: ...r Boards Application This panel converts the high density ribbon cable connectors coming from the APC8600 carrier board Acromag cable Model 5029 900 to screw terminals for direct wired interfaces This...

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