General Lists
Name
Description
Logics.LE49.Reset Latch-
I
State of the module input: Reset Signal for the Latching
Logics.LE50.Gate Out
Signal: Output of the logic gate
Logics.LE50.Timer Out
Signal: Timer Output
Logics.LE50.Out
Signal: Latched Output (Q)
Logics.LE50.Out inverted Signal: Negated Latched Output (Q NOT)
Logics.LE50.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE50.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE50.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE50.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE50.Reset Latch-
I
State of the module input: Reset Signal for the Latching
Logics.LE51.Gate Out
Signal: Output of the logic gate
Logics.LE51.Timer Out
Signal: Timer Output
Logics.LE51.Out
Signal: Latched Output (Q)
Logics.LE51.Out inverted Signal: Negated Latched Output (Q NOT)
Logics.LE51.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE51.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE51.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE51.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE51.Reset Latch-
I
State of the module input: Reset Signal for the Latching
Logics.LE52.Gate Out
Signal: Output of the logic gate
Logics.LE52.Timer Out
Signal: Timer Output
Logics.LE52.Out
Signal: Latched Output (Q)
Logics.LE52.Out inverted Signal: Negated Latched Output (Q NOT)
Logics.LE52.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE52.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE52.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE52.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE52.Reset Latch-
I
State of the module input: Reset Signal for the Latching
Logics.LE53.Gate Out
Signal: Output of the logic gate
Logics.LE53.Timer Out
Signal: Timer Output
Logics.LE53.Out
Signal: Latched Output (Q)
Logics.LE53.Out inverted Signal: Negated Latched Output (Q NOT)
Logics.LE53.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE53.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE53.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE53.Gate In4-I
State of the module input: Assignment of the Input Signal
686
MRI4
DOK-HB-MRI4-2E
Содержание highprotec MRI4
Страница 1: ...Manual Feeder Protection MRI4 Software Version 3 4 a DOK HB MRI4 2E Revision C English...
Страница 43: ...Installation and Connection 43 MRI4 DOK HB MRI4 2E...
Страница 46: ...Installation and Connection Ensure the correct tightening torques 46 MRI4 DOK HB MRI4 2E...
Страница 56: ...Installation and Connection Ethernet RJ45 Terminals 56 MRI4 DOK HB MRI4 2E 1 8 TxD TxD RxD n c n c RxD n c n c...
Страница 69: ...Navigation Operation Navigation Operation 69 MRI4 DOK HB MRI4 2E 1 2 3 5 7 6 8 10 9...
Страница 353: ...Device Parameters 353 MRI4 DOK HB MRI4 2E...
Страница 373: ...373 MRI4 DOK HB MRI4 2E...