TMP92CF30
2009-06-12
92CF30-526
AD Conversion Result Compare Criterion Register 0 Low
7 6 5 4 3 2 1 0
bit
Symbol
ADR21
ADR20
Read/Write R/W
Reset
State
0
0
ADCM0REGL
(12B4H)
Function
Store Lower 2 bits of an
AD conversion result
compare criterion
AD Conversion Result Compare Criterion Register 0 High
7 6 5 4 3 2 1 0
bit Symbol
ADR29
ADR28
ADR27
ADR26 ADR25 ADR24 ADR23 ADR22
Read/Write R/W
Reset
State
0 0 0 0 0 0 0 0
ADCM0REGH
(12B5H)
Function
Store Upper 8 bits of an AD conversion result compare criterion
AD Conversion Result Compare Criterion Register 1 Low
7 6 5 4 3 2 1 0
bit
Symbol
ADR21
ADR20
Read/Write R/W
Reset
State
0
0
ADCM1REGL
(12B6H)
Function
Store Lower 2 bits of an
AD conversion result
compare criterion
AD Conversion Result Compare Criterion Register 1 High
7 6 5 4 3 2 1 0
bit Symbol
ADR29
ADR28
ADR27
ADR26 ADR25 ADR24 ADR23 ADR22
Read/Write R/W
Reset
State
0 0 0 0 0 0 0 0
ADCM1REGH
(12B7H)
Function
Store Upper 8 bits of an AD conversion result compare criterion
Note: Disable the AD monitor function (ADMOD4<CMEN1:0>
=
“0”) before attempting to set or modify the value of
these registers.
Figure 3.22.10 AD Conversion Registers
Содержание TLCS-900/H1 Series
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