Toshiba TLCS-900/H1 Series, Руководство пользователя

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TMP92CF30
2009-06-12 92CF30-290
<Integer divider (N divider)>
For example, when the source clock frequency (f
c
) is 19.6608 MHz, the input clock is
φ T2, the frequency divider N (BR0CR<BR0S3:0>) = 8, and BR0CR<BR0ADDE> = “0”,
the baud rate in UART Mode is as follows:
*
Clock state Clock gear : 1/1
Input clock of baud rate generator
Baud Rate
=
Frequency divider for baud rate generator
÷
16
f
C
/16
=
8
÷
16
=
19.6608
×
10
6 ÷
16
÷
8
÷
16
=
9600 (bps)
Note: The N + (16 – K) / 16 division function is disabled and setting BR0ADD <BR0K3:0> is invalid.
<N+(16-K)/16 divider (UART Mode only)>
Accordingly, when the source clock frequency (fc) = 15.9744 MHz, the input clock is
φ T2, the frequency divider N (BR0CR<BR0S3:0>) = 6, K (BR0ADD<BR0K3:0>) = 8,
and BR0CR <BR0ADDE> = “1”, the baud rate in UART Mode is as follows:
*
Clock state Clock gear : 1/1
Input clock of baud rate generator
Baud Rate
=
Frequency divider for baud rate generator
÷
16
f
C
/16
(16
−
8)
=
6
+
16
÷
16
8
=
15.9744
×
10
6 ÷
16
÷
(6
+
16
)
÷
16
=
9600 (bps)
Table 3.14.3 show examples of UART Mode transfer rates.
Additionally, the external clock input is available in the serial clock. (Serial Channel
0). The method for calculating the baud rate is explained below:
• In UART Mode
Baud rate = external clock input frequency
÷
16
It is necessary to satisfy (external clock input cycle) ≥ 4/f
SYS
•
In I/O Interface Mode
Baud rate = external clock input frequency
It is necessary to satisfy (external clock input cycle)
≥
16/f
SYS