Copyright © Siemens AG 2010. All rights reserved.
Page
13
ERTEC 400 Manual
Technical data subject to change
Version 1.2.2
Different GPIO’s are used on the Evaluation Board EB400. See Dokument /13/ Table 9.
1.5.2
JTAG and Debug
No.
Signal Name
I/O
(Reset)
Pull-
Pin No.
Comment
Debug / JTAG (BOUNDARY SCAN)
33
TRST_N
I (I)
V19
JTAG Reset
34
TCK
I (I)
up
W19
JTAG Clock
35
TDI
I (I)
up
W18
JTAG Data In
36
TMS
I (I)
up
U19
JTAG Test Mode Select
37
TDO
O (O)
V16
JTAG Data Out
38
DBGREQ
I (I)
dn
W21
ARM9 Debugging (PD)
39
TAP_SEL
I (I)
up
AB12
Select TAP Controller:
0: Boundary Scan TAP Controller
selected
1: ARM-TAP Controller selected
or Scan Clock (Scan mode)
1.5.3
Trace Port
No.
Signal Name
I/O
(Reset)
Pull-
Pin No.
Comment
Trace Port (Basic)
40
PIPESTA0
O (O)
Y21
Trace Pipeline Status(0)
or TEST_N=0: Test input
41
PIPESTA1
O (O)
AA22
Trace Pipeline Status(1)
or TEST_N=0: Test input
42
PIPESTA2
O (O)
AA21
Trace Pipeline Status(2)
or TEST_N=0: Test input
43
TRACESYNC
O (O)
AB21
Trace Sync signal
1.5.4
Clock and Reset
No.
Signal Name
I/O
(Reset)
Pull-
Pin No.
Comment
CLOCK / RESET GENERATION
44
TRACECLK
O (O)
AB16
ETM Trace Clock
or Scan Clock (Scan mode)
45
CLKP_A
Osc - I (I)
AA13
Quartz connection
46
CLKP_B
Osc - O (O)
W12
Quartz connection
47
F_CLK
I (I)
AA12
F_CLK for F-counter
48
REF_CLK
I (I)
R22
Reference clock for RMII
49
RESET_N
I (I)
up
AA15
HW reset
1.5.5
TEST Pins
No.
Signal Name
I/O
(Reset)
Pull-
Pin No.
Comment
TEST
50
TEST_N (3)
I
up
P17
Test mode
51
TMC1 (3)
I
R17
Test configuration
52
TMC2 (3)
I
T18
Test configuration