(Termination mode)
Signal description (Parallel I/F)
The 1284 mode signals are described below. The name in ( ) shows
the name in the capability mode.
Host Clk/nWrite (nStroke): Driven by the host.
Capability Mode:
Set to active LOW in order to transfer data
to the input latch of peripheral devices.
The data are valid when nStrobe is LOW.
Negotiation phase:
Set the active LOW in order to transfer the
extensibility request value to the input
latch of peripheral devices. The data are
valid at the falling edge of HostClk.
Reverse data transfer
phase:
Set to HIGH during transition to the Nibble
Mode in order not to latch data to the
peripheral devices. To confirm data trans-
fer from peripheral devices, it is set to
LOW pulse during Byte Mode transfer.
The peripheral devices must confirm that
new data byte is not transferred to the
input latch of the peripheral devices by
this pulse.
ECP Mode:
To transfer data or address information
from the host to the peripheral devices,
PeriphAck (Busy) is used in the closed
loop handshake.
EPP Mode:
Set to LOW in order to show write opera-
tion of address or data to peripheral
devices.
Set to HIGH in order to show read opera-
tion of address or data from peripheral
devices.
AD1 – AD8 (Data 1 – Data 8): Driven by the host in the Compatibility
Mode and negotiation phase. (Not used in the Nibble Mode. Bi-direc-
tional in the other modes.)
All modes: Data 1 is the lowest bit (Bit 0). Data 8 is the highest bit (Bit
7).
Compatibility Mode:
Forward channel data
Negotiation phase:
Extensibility request value
Reverse data transfer
phase:
Nibble Mode: Not used. (The host con-
tinues to drive the bus.)
Byte mode:
Reverse channel data
EPC mode:
Address or data transfer from the host to
the peripheral device or from the
peripheral device to the host.
EPP mode:
Address or data transfer from the host to
the peripheral device or from the
peripheral device to the host.
PtrClk/PeriphClk/Intr(nAck): Driven by the peripheral devices.
Compatibility Mode:
Set to LOW pulse by the peripheral device
to confirm transfer of the data byte from
the host.
Negotiation phase:
Set to LOW to confirm the 1284 support.
Then set to HIGH to show that Xflag
(Select) and data flags can be read.
Reverse data transfer/
phase:
Used in either mode of Nibble and Byte to
identify (qualify) the data which are under
transmission to the host.
Low
/SELECTIN
HOST
PRINTER
0~35ms
min0.5µs
0~1s
On
Evalid
BUSY
High
/FAULT
High
/INTR
Low
/INTR
Low
Clr
DELAY
Low
Interrupt
SELECT
Low
/ACK
On
/AUTOFD
Low
/ACK
High
DELAY
On
Interrupt
Clr
PE
/FAULT
SELECT
/INIT
/AUTOFD
HIgh
min0.5µs
0~1s
Compatibility status
Compatibility status
Compatibility status
Compatibility status
ON when termination is effective.
PE, BUSY, and /Fault are set with software.
PE, BUSY, and /Fault are set with software.
SHARP SERVICE MANUAL JX8200SM [13] ELECTRICAL SECTION
13 – 26
Содержание JX-8200
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