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8: Lower limit of frequency (FLL)
The signal is given if the preset frequency is higher than lower limit of
frequency and the operating frequency reaches the lower limit of
frequency.
9: Zero-speed running
The signal is given if the inverter’s output frequency is 0 and the
inverter is in operating status.
10: Completion of simple PLC operation stages
The signal is given (pulse, 500ms) if the present stage of PLC operation
is finished.
11: PLC cycle completion indication
The signal (pulse, 500ms width) is given if one cycle of PLC operation
is finished.
12: preset counting value arrival
13: reference length arrival
Refer to F6.11~F6.12.
14: Inverter running state
When inverter is in a state of reverse, output is actived
15: Inverter is ready (RDY)
The RDY signal is output when the inverter has no fault, its DC bus
voltage is normal; the Start Prohibit function is disabled. It is ready to
start.
16: Inverter fails
The signal is given if the inverter has faults.
17: Extended function 1 of host
The output signal of terminal Y1 or TC is directly controlled by a serial
port. Refer to the communication protocol of SINUS VEGA.
19: preset operating time out
The signal is given if the inverter’s total operating time (FN.01) reaches
preset operating time (FN.00).
