I. SDLC/HDLC Protocol
154001UA
I-3
Figure I-2. SDLC/HDLC Channel EIA Signals
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TXD
RXD
RTS
CTS
DSR
GND
DCD
TXC
RXC
DTR
RI
DRS
BO
TXD
RXD
RTS
CTS
DSR
GND
DCD
TXC
RXC
DTR
RI
DRS
BO
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TXD
RXD
RTS
CTS
DSR
GND
LSD
TXC
RXC
XRXC
DTR
SQ
RI
ETXC
BUSY
TXD
RXD
RTS
CTS
DSR
GND
LSD
TXC
RXC
DTR
RI
ETXC
3028
(DCE)
DTE
*
*
Depends on clock source
*
SDLC Tail Circuit Application
Standard SDLC DTE Connection
2031I-2