CHAPTER 5 CLOCK GENERATOR
Preliminary User’s Manual U19014EJ1V0UD
111
5.6.8 Time required for switchover of CPU clock and main system clock
By setting bits 0 to 2 (PCC0 to PCC2) of the processor clock control register (PCC), the division ratio of the main
system clock can be changed.
The actual switchover operation is not performed immediately after rewriting to PCC; operation continues on the
pre-switchover clock for several clocks (see
Table 5-6
).
Table 5-6. Time Required for Switchover of CPU Clock and Main System Clock Cycle Division Factor
Set Value Before
Switchover
Set Value After Switchover
PCC2 PCC1 PCC0 PCC2 PCC1 PCC0 PCC2 PCC1 PCC0 PCC2 PCC1 PCC0 PCC2 PCC1 PCC0
PCC2 PCC1 PCC0
0 0 0 0 0 1 0 1 0 0 1 1 1 0 0
0
0
0
16 clocks
16 clocks
16 clocks
16 clocks
0
0
1
8 clocks
8 clocks
8 clocks
8 clocks
0
1
0
4 clocks
4 clocks
4 clocks
4 clocks
0
1
1
2 clocks
2 clocks
2 clocks
2 clocks
1
0
0
1 clock
1 clock
1 clock
1 clock
Remark
The number of clocks listed in Table 5-6 is the number of CPU clocks before switchover.
By setting bit 0 (MCM0) of the main clock mode register (MCM), the main system clock can be switched (the
internal high-speed oscillation clock to the high-speed system clock).
The actual switchover operation is not performed immediately after rewriting to MCM0; operation continues on the
pre-switchover clock for several clocks (see
Table 5-7
).
Whether the CPU is operating on the internal high-speed oscillation clock or the high-speed system clock can be
ascertained using bit 1 (MCS) of MCM.
Table 5-7. Maximum Time Required for Main System Clock Switchover
Set Value Before Switchover
Set Value After Switchover
MCM0
MCM0
1
0
1 + 2f
RH
/f
XH
clock
Caution When switching the internal high-speed oscillation clock to the high-speed system clock, bit 2
(XSEL) of MCM must be set to 1 in advance. The value of XSEL can be changed only once after a
reset release.
Remarks 1.
The number of clocks listed in Table 5-7 is the number of main system clocks before switchover.
2.
Calculate the number of clocks in Table 5-7 by removing the decimal portion.
Example
When switching the main system clock from the internal high-speed oscillation clock to the
high-speed system clock (@ oscillation with f
RH
= 16 MHz, f
XH
= 12 MHz)
1 + 2f
RH
/f
XH
= 1 + 2
×
16/12 = 1 + 2
×
1.33 = 1 + 2.66 = 3.66
→
3 clocks
5.6.9 Conditions before clock oscillation is stopped
The following lists the register flag settings for stopping the clock oscillation (disabling external clock input) and
conditions before the clock oscillation is stopped.
electronic components distributor
