Nations Technologies Inc.
Tel
:
+86-755-86309900
:
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
80
/
631
Bit Field
Name
Description
Cleared by software by writing to the RMRSTF bit.
0: No windowed watchdog reset occurred
1: Window watchdog reset occurred
29
IWDGRSTF
Independent watchdog reset flag
Set by hardware when an independent watchdog reset occurs
Cleared by software by writing to the RMRSTF bit.
0: No independent watchdog reset occurred
1: Independent watchdog reset occurred
28
SFTRSTF
Software reset flag
Set by hardware when a software reset occurs.
Cleared by software by writing to the RMRSTF bit.
0: No software reset occurred
1: Software reset occurred
27
PORRSTF
Power-on/power-down reset flag
Set by hardware when a power-on/power-down reset occurs
Cleared by software by writing to the RMRSTF bit.
0: No power on/power off reset occurred
1: Power-on/power-off reset occurred
26
PINRSTF
External pin reset flag
Set by hardware when a reset from the NRST pin occurs.
Cleared by software by writing to the RMRSTF bit.
0: No NRST pin reset occurred
1: NRST pin reset occurred
25
MMURSTF
MMU reset flag
Set by hardware when MMU reset occurs.
Cleared by software by writing to the RMRSTF bit.
0: No MMU reset occurred
1: MMU reset occurred
24
RMRSTF
Clear the reset flag
Set by the software to clear the reset flag.
0: No effect
1: Clear the reset flag
23
RAMRSTF
RAM reset flag.
Set by hardware when a RAM reset occurs and cleared by software by writing to
the RMRSTF bit.
0: No RAM reset occurred
1: A RAM reset has occurred
22:15
MSITRIM[7:0]
Internal multi-speed clock correction value.
Written by software. The value of these bits will be added to MSICAL[7:0] to form
the final calibration value used to calibrate the frequency of the internal MSI RC
oscillator.