Micros Systems Workstation 4, Руководство по обслуживанию

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2-16 Workstation 4 and 4 LX Field Service Guide
WS4 Technical Overview
PC87360 Super IO
ACCESS.bus Interface (AB28/ABRD36 Sheet 19)
The ACB is a two-wire synchronous serial interface compatible with the ACESS.bus
physical layer. It is compatible with the Intel SMBus (System Management Bus) and
Phillips I
2
C bus architectures. The ACB can be configured as a bus master or slave,
and can maintain bi-directional communication with both master and slave devices.
On the WS4 system board, the ACB is connected to U21, a 24LC16 serial EEPROM.
The contents of this device are accessed by the boot loader at start-up to determine the
systems ‘Last Power State.’ It also stores the workstation serial number and type,
accessed by EEPOM.DLL in Windows CE.
The interface is composed of a bi-directional SDL (Serial Data Line), and SCL (Serial
Clock Line) which allows easy interfacing to a wide range of devices such as the
Serial EEPROM.
Low Pin Count (LPC) Interface (AB28/ABRD36 - Sheets 1 and 19)
The interface between the SC3200 core logic and the Super IO is based on the Intel
®
Low Pin Count Interface Specification as described in the LPC 1.0 specification. It is
a PCI-like bus composed of seven signal lines used to replace the traditional legacy
ISA as the interface between the SC3200 and the Super IO. Figure 2-10, below
provides a brief description of each interface signal.
Figure 2-10: Low Pin Count Interface Signal Description
Name Type Description
LAD[3:0] I/O LPC Multiplexed Command, Address and
Data
LFRAME# O LPC Frame: Indicates the start of an LPC
cycle
LDRQ# I LPC Serial DMA/Master Request Inputs:
Used to request DMA or bus master access.
LDRQ[1]# I LPC Serial DMA/Master Request Input:
Second DMA or bus master request.
SERIRQ I/O Serialized IRQ Line.This signal is required
for the host if it does not contain ISA IRQ
lines as inputs.