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2-14
Functional Description
Note:
In DriverLINX, use an internally clocked rate generator when
you want to write analog output samples at equally spaced time
intervals. The DDA-08/16 hardware can write the selected analog
output channels simultaneously at each timing event, or individually,
with one channel per timing event.
●
Specify internal clocking using a
Rate
Generator
on
Channel
0
with an
Internal 1
Clock
source.
●
The
Period
property specifies the time interval between samples
in tics, where a tic is 1
µ
s or 1MHz. The minimum period is 20
tics or 50kHz. The maximum period is 25500 tics or 0.004Hz.
●
The
Gate
property specifies how the GATE IN signal affects
sampling.
Refer to
Using DriverLINX with Your Hardware, Keithley DDA-08/16
manual that accompanies your DriverLINX software.
Figure 2-5. Using a Hardware Gate
Software starts
the operation
1st update
(external clock)
Internal Clock
1st update
(internal clock)
2nd update
(internal clock)
4th update
(internal clock)
External Clock
(Falling Edge)
3rd update
(external clock)
Gate Signal
(Positive Gate)
Gate is high;
updates occur
Gate is low;
updates are inhibited
. . . . . . . . . . . .
2nd update
(external clock)
3rd update
(internal clock)
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