Intel 80C196KB Series, Руководство пользователя, Страница: 78 / 98

80C196KB USER’S GUIDE
Figure 15-5 is an example of external circuitry to de-
code WRL and WRH.
Write Strobe Mode
The Write Strobe Mode eliminates the need to external-
ly decode for odd and even byte writes. If CCR bit 2 is
0, and the bus is a 16-bit cycle, WRL and WRH are
generated in place of WR and BHE. WRL is asserted
for all byte writes to an even address and all word
writes. WRH is asserted for all byte writes to odd ad-
dresses and all word writes. The Write Strobe mode is
shown in Figure 15-6.
In the eight bit mode, WRL and WRH are asserted for
both even and odd addresses.
Address Valid Strobe Mode
Address Valid strobe replaces ALE if CCR bit 3 is 0.
When Address valid Strobe mode is selected, ADV will
be asserted after an external address is setup. It will
stay asserted until the end of the bus cycle as shown in
Figure 15-7. ADV can be used as a simple chip select
for external memory. ADV looks exactly like ALE for
back to back bus cycles. The only difference is ADV
will be inactive when the external bus is idle.
Address Valid with Write Strobe
If CCR bits 2 and 3 are 0, the Address Valid with Write
Strobe mode is enabled. Figure 15-8 shows the signals.
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16-Bit Bus Cycle
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8-Bit Bus Cycle
Figure 15-6. Write Strobe Mode
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16-Bit Bus Cycle
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8-Bit Bus Cycle
Figure 15-7. Address Valid Strobe Mode
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数控原理与维修
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