Guildline 6530 Series, Руководство оператора

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Section 5
OM6530-C1-00
19 November, 2019
5-20
Table 5-6 : Status Byte Register
The response from this command is a decimal integer in the range 0-255. This decimal
integer when expressed in base 2 (binary) represents the bit values in the Status Byte
Register. Note that the Master Summary Status bit and Not RQS is reported in bit 6.
The Status Byte Register can also be read with the Read Serial Poll hardware command
on the IEEE-488 interface.
This Register can be read by Serial Poll or by the *STB? command.
5.6.13. *TST? - QUERY RESULTS OF SELF TEST
This command is intended to report the status of any self-tests performed by the 6530. If
the 6530 passes all of it’s self-tests then the reply will be 0.
The possible failure codes are:
Error Status. Bit 0 – Non-Volatile checksum failure
Bit 1 – Rom checksum failure. Could be ROM/Aux ROM.
Bit 2 – Analog failure.
Bit 3 - +5 volts
Bit 4 - -5 volts
Bit 5 - +15 volts
Bit 6 - -15 volts
Bit 7 – Precharge
Bit 8 – High voltage monitor
Bit 9 – 10 volt reference
Bit 10 - Ramp
Bit 11 – Digital failure.
Bit 12 - +5 volts
Bit 13 - -5 volts
Bit 14 - +15 volts
Bit 15 - -15 volts
Bit Location Name Description
0 LSB INT Interlock status. 0=enabled, 1=disabled.
1 RDY Reading complete.
2 min_max Minimum/Maximum timeout error if set.
3 IFL Input FuLl. This bit is set when the input queue is over 75% full and cleared when the queue
drops below 25% full.
4 MAV Message AVailable. This bit is set when the output queue is not empty.
5 ESB Event Summary Bit. This bit is set when the result of a bitwise AND of the Event Status
Enable register is not zero.
6 RQS ReQuest for Service. This bit is set when the result of a bit-wise AND of the Status Byte
Register and the Service Request Enable register is not zero.
7 MSB RES Resistivity Input. 0=volume, 1=surface.