Symphony DSP56724/DSP56725 Multi-Core Audio Processors, Rev. 0
20-2
Freescale Semiconductor
Chip Configuration Module
shows the register summary table for Chip-configuration module.
Table 20-2. CFG Register Summary
Name
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
Y:FFFFE7
R
W
R
W
EMBC
Y:FFFFE6
R
EPMBC
P Space Burst Boundary
EYMBC
W
R
Y Space Burst Boundary
EXMBC
X Space Burst Boundary
W
LPSC
Y:FFFFE5
R
lplock
W
R
EMC PLL Power Down and
clock frequency divide
control
W
PMC
Y:FFFFE4
R
PKG
ESAI, HCKR Pin Mux
Select
spdout1_en
spdin1_en
W
R
SPDIF Pin Mux Control
Timer Pin Mux Control
W
EPSC
Y:FFFFE3
R
ESAI Pin Switch Control.1
W
R
ESAI Pin Switch Control.0
W
ODBC
Y:FFFFE2
R
ONCE
Debug Enable
W
R
Burst Buffer Invalidate
W
PSRC
Y:FFFFE1
R
W
R
Soft Reset Control Bits
W
Содержание Symphony DSP56724
Страница 22: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 1 10 Freescale Semiconductor Introduction ...
Страница 52: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 2 30 Freescale Semiconductor Signal Descriptions ...
Страница 112: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 7 12 Freescale Semiconductor Clock Generation Module CGM ...
Страница 244: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 14 6 Freescale Semiconductor Shared Bus Arbiter ...
Страница 246: ...Symphony DSP56724 DSP56725 Multi Core Audio Processors Rev 0 15 2 Freescale Semiconductor Shared Memory Shared Memory ...