Freescale Semiconductor MC9S12ZVM series, Справочное руководство

Страница: 123 / 825

Chapter 3 Memory Mapping Control (S12ZMMCV1)
MC9S12ZVM Family Reference Manual Rev. 1.3
Freescale Semiconductor 123
The MMCEC register captures debug information about access violations. It is set to a non-zero value if a
S12ZCPU access violation or an uncorrectable ECC error has occurred. At the same time this register is
set to a non-zero value, access information is captured in the MMCPCn and MMCCCRn registers. The
MMCECn, the MMCPCn and the MMCCCRn registers are not updated if the MMCECn registers contain
a non-zero value. The MMCECn registers are cleared by writing the value 0xFFFF.
3.3.2.3 Captured S12ZCPU Condition Code Register (MMCCCRH, MMCCCRL)
Figure 3-6. Captured S12ZCPU Condition Code Register (MMCCCRH, MMCCCRL)
Read: Anytime
Write: Never
7-4
(MMCECL)
ACC[3:0]
Access Type Field — The ACC[3:0] bits capture the type of memory access, which caused the access
violation. The access type is captured in form of a 4 bit value which is assigned as follows:
0:none (no error condition detected)
1:opcode fetch
2:vector fetch
3:data load
4:data store
5-15: reserved
3-0
(MMCECL)
ERR[3:0]
Error Type Field — The EC[3:0] bits capture the type of the access violation. The type is captured in form of
a 4 bit value which is assigned as follows:
0:none (no error condition detected)
1:access to an illegal access
2:uncorrectable ECC error
3-15:reserved
Address: 0x0082 (MMCCCRH)
7 6 5 4 3 2 1 0
R CPUU 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0
Address: 0x0083 (MMCCCRL)
7 6 5 4 3 2 1 0
R 0 CPUX 0 CPUI 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0
Field Description