Chapter 1 Principles
CPU ADAM 821x
1-10
ADAM 8000 Manual CPU 821x – Rev 1.1
When configuring a CPU 821xDP, the central plugged-in modules are
parameterized like shown above.
Slave parameterization
As intelligent slave, the Profibus section maps its data areas into the
memory area of the CPU 821xDP. The assignment of the areas is fixed via
the propierties of the CPU 821xDP. These areas have to be provided with
an according PLC program.
Attention!
The length values of input and output area have to be identical to the byte
values of the master project engineering. Otherwise no Profibus communi-
cation is possible (slave failure).
Steps of project engineering in the DP master
•
Configure the CPU with DP master system (address 2)
•
Add Profibus slave 821xDP (GSD-file required)
•
Assign Profibus input and output area starting with plug-in location 0
The following picture illustrates the project engineering:
Slave System
PB-
Addr.:1
Slot Module
0 CPU 821xDP
1
. Expansion
. modules
.
3
PB-
Addr.:3
DP200V
CPU21x
Slot Module
0 Output (Bytes)
1 Input (Bytes)
Master system
PB-
Addr.:2
The project engineering of network connections via TCP/IP takes place via
the configuration tool WinNCS from Advantech.
Project
engineering of the
CPU 821xDP in a
master system
Master projecting
of the CPU
821xNET
