Chapter 5 Deployment of the CPU 821xDPM
CPU ADAM 821x
5-14
ADAM 8000 Manual CPU 821x – Rev 1.1
The CPU switches to RUN with the program stored in the battery buffered
RAM.
The DP master receives valid parameters and starts with them.
The reading of a MMC only takes place after an OVERALL_RESET.
After the OVERALL_RESET, the DP master proofs the validity of the
parameters in the CPU.
If these are valid, they are taken over.
If they are invalid, the CPU switches to STOP and the DP master starts
with the default values.
The battery is loaded directly via the integrated power supply by means of a
special load electronic and provides a buffer of max. 30 days. Is this time
exceeded, there may be a total discharge of the battery and the battery
buffered RAM is erased.
Now the CPU proceeds an overall_reset. If a MMC is plugged-in, the
application on it is transferred into the RAM and the DP master is supported
with parameters.
If these are valid, the DP master links-up to the bus with those parameters.
If they are not valid, the master starts with default values of its ROM
(Add.:1; 1.5MBit) and monitors this via the IF-LED.
Depending on the operating mode selected at the module, the CPU
switches to RUN resp. stays in STOP.
This procedure is fixed in the diagnostic buffer by means of the following
entry: "Automatic start OVERALL_RESET (unbuffered NETZ_EIN/
Power_on)".
Boot procedure with
valid data in the
CPU
Boot procedure
with valid
Memory Card
Start-up at empty
battery
