YASKAWA CPU 314ST Manual Download Page 65

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PROFIBUS DP syncInOut

CPU and DP master system are waiting on

each other and form thereby a cycle.

Default: PROFIBUS DP async

5.9.2.1.1 Synchronization between master system and CPU

Normally the cycles of CPU and DP master run independently. The cycle time of the CPU

is the time needed for one OB1 cycle and for reading respectively writing the inputs

respectively outputs. The cycle time of a DP master depends among others on the

number of connected slaves and the baud rate, thus every plugged DP master has its

own cycle time. Due to the asynchronism of CPU and DP master the whole system gets

relatively high response times. The synchronization behavior between every VIPA

PROFIBUS DP master and the CPU may be configured by means of a hardware configu-

ration as shown above. The different modes for the synchronization are in the following

described.

In PROFIBUS DP SyncInOut mode CPU and DP master system are waiting on each

other and form thereby a cycle. Here the whole cycle is the sum of the longest DP master

cycle and CPU cycle. By this synchronization mode you receive global consistent in-/

output data, since within the total cycle the same input and output data are handled suc-

cessively by CPU and DP master system. If necessary the time of the Watchdog of the

bus parameters should be increased at this mode.

In this operating mode the cycle time of the VIPA DP master system depends on the CPU

cycle time. After CPU start-up the DP master gets synchronized. As soon as their cycle is

passed they wait for the next synchronization impulse with output data of the CPU. So the

response time of your system can be improved because output data were directly trans-

mitted to the DP master system. If necessary the time of the Watchdog of the bus param-

eters should be increased at this mode.

Overview

PROFIBUS DP SyncInOut

PROFIBUS DP SyncOut

VIPA System 300S

Deployment CPU 314-6CF23

Setting VIPA specific CPU parameters > VIPA specific parameters

HB140 | CPU | 314-6CF23 | en | 19-01

Summary of Contents for CPU 314ST

Page 1: ...CPU 314 6CF23 Manual HB140 CPU 314 6CF23 en 19 01 VIPA System 300S SPEED7 CPU 314ST www vipa com en service support manuals ...

Page 2: ...313 6CF23_000_CPU 314ST 4 EN 2019 VIPA GmbH Ohmstr 4 91074 Herzogenaurach Telephone 49 9132 744 0 Fax 49 9132 744 1864 Email info vipa com Internet www vipa com ...

Page 3: ...4 2 3 Memory management 31 4 2 4 Slot for storage media 31 4 2 5 Battery backup for clock and RAM 31 4 2 6 Operating mode switch 32 4 2 7 LEDs 32 4 2 8 In Output range CPU 314 6CF23 35 4 3 Technical data 38 5 Deployment CPU 314 6CF23 49 5 1 Assembly 49 5 2 Start up behavior 49 5 3 Addressing 50 5 3 1 Overview 50 5 3 2 Addressing 50 5 3 3 Address assignment I O part 53 5 4 Hardware configuration CP...

Page 4: ...Overview 92 6 2 In Output range CPU 314 6CF23 93 6 3 Address assignment I O part 95 6 4 Analog part 96 6 5 Analog part Parametrization 100 6 6 Analog part Diagnostic functions 105 6 7 Digital part 108 6 8 Counter Fast introduction 110 6 9 Counter In output area 112 6 10 Counter Parametrization 114 6 11 Counter Functions 120 6 12 Counter Additional functions 125 6 13 Counter Diagnostic and interrup...

Page 5: ...ring 164 9 3 3 Test the PLC program in the Simulator 170 9 3 4 Transfer PLC program to CPU and its execution 171 10 Configuration with TIA Portal 173 10 1 TIA Portal Work environment 173 10 1 1 General 173 10 1 2 Work environment of the TIA Portal 174 10 2 TIA Portal Hardware configuration CPU 175 10 3 TIA Portal Hardware configuration I O modules 176 10 4 TIA Portal Hardware configuration Etherne...

Page 6: ... may be included for units which are not present at the customer site The exact scope of delivery is described in the respective purchase contract Hereby VIPA GmbH declares that the products and systems are in compliance with the essential requirements and other relevant provisions Conformity is indicated by the CE marking affixed to the product For more information regarding CE marking and Declar...

Page 7: ...contains a description of the construction project implementation and usage Product Order number as of state CPU HW CPU FW DPM FW CPU 314ST 314 6CF23 01 V3 7 5 V3 3 5 The manual is targeted at users who have a background in automation technology The manual consists of chapters Every chapter provides a self contained description of a specific topic The following guides are available in the manual n...

Page 8: ...nel in the n project design department n installation department n commissioning n operation CAUTION The following conditions must be met before using or commis sioning the components described in this manual Hardware modifications to the process control system should only be carried out when the system has been disconnected from power Installation and hardware modifications only by properly train...

Page 9: ... that have been damaged by electrostatic discharges can fail after a temperature change mechanical shock or changes in the electrical load Only the consequent implementation of protection devices and meticulous attention to the applicable rules and regulations for handling the respective equipment can prevent failures of electrostatic sensitive modules Modules must be shipped in the original packi...

Page 10: ...e handled by the CPU in accordance with their priority Since a timer or an alarm event requires a quick reaction the CPU will interrupt the cyclic pro cessing when these high priority events occur to react to the event Cyclic processing will resume once the reaction has been processed This means that cyclic processing has the lowest priority 2 2 2 Applications The program that is present in every ...

Page 11: ...Double words In your program you may load cells of the timer with a value between 10ms and 9990s As soon as the user application executes a start operation the value of this timer is decremented by the interval that you have specified until it reaches zero You may load counter cells with an initial value max 999 and increment or decrement these when required A data block contains constants or vari...

Page 12: ...n is stored in the battery buffered RAM or on an additionally plug gable memory card n The CPU 314 6CF23 is configured as CPU 317 2DP 6ES7 317 2AK14 0AB0 V3 3 from Siemens The CPU has an integrated memory Information about the capacity of the memory may be found at the front of the CPU The memory is divided into the following parts n Load memory 2MB n Code memory 50 of the work memory n Data memor...

Page 13: ...P channel and program res remote control your CPU You may also access the CPU with a visualization software via these connections n Wiring by means of spring pressure connections CageClamps at the front connector n Core cross section 0 08 2 5mm2 n Total isolation of the wiring at module change n Potential separation of all modules to the backplane bus Dimensions of the basic enclosure n 2tier widt...

Page 14: ...ce Insulation voltage to reference earth Inputs outputs AC DC 50V test voltage AC 500V Protective measures against short circuit Environmental conditions to EN 61131 2 Climatic Storage transport EN 60068 2 14 25 70 C Operation Horizontal installation hanging EN 61131 2 0 60 C Horizontal installation lying EN 61131 2 0 55 C Vertical installation EN 61131 2 0 50 C Air humidity EN 60068 2 30 RH1 with...

Page 15: ...everity 2 EN 61000 4 3 HF field immunity casing 80MHz 1000MHz 10V m 80 AM 1kHz 1 4GHz 2 0GHz 3V m 80 AM 1kHz 2GHz 2 7GHz 1V m 80 AM 1kHz EN 61000 4 6 HF conducted 150kHz 80MHz 10V 80 AM 1kHz EN 61000 4 4 Burst degree of severity 3 EN 61000 4 5 Surge degree of severity 3 Due to the high energetic single pulses with Surge an appropriate external protective circuit with lightning protection elements ...

Page 16: ...lane bus coupler Before installing the modules you have to clip the backplane bus coupler to the module from the backside The backplane bus couplers are included in the delivery of the peripheral modules With SPEED Bus the bus connection happens via a SPEED Bus rail integrated in the profile rail at the left side of the CPU Due to the parallel SPEED Bus not all slots must be occupied in sequence Y...

Page 17: ...ion dimensions 2tier width WxHxD in mm 80 x 125 x 120 Dimensions Basic enclo sure Installation dimensions VIPA System 300S Assembly and installation guidelines Installation dimensions HB140 CPU 314 6CF23 en 19 01 17 ...

Page 18: ...modules SPEED Bus Standard bus A B C D E 391 1AF10 2 6 530 100 268 510 10 391 1AF30 6 2 530 100 105 510 10 391 1AF50 10 0 530 20 20 510 10 391 1AJ10 2 15 830 22 645 800 15 391 1AJ30 6 11 830 22 480 800 15 391 1AJ50 10 7 830 22 320 800 15 Measures in mm Pre manufactured SPEED Bus profile rail Dimensions VIPA System 300S Assembly and installation guidelines Assembly SPEED Bus HB140 CPU 314 6CF23 en ...

Page 19: ...aps of the SPEED Bus slot with a screw driver open and pull down For the SPEED Bus is a parallel bus not every SPEED Bus slot must be used in series Leave the protection flap installed at an unused SPEED Bus slot 2 At deployment of a DC 24V power supply install it at the shown position at the pro file rail at the left side of the SPEED Bus and push it to the left to the isolation bolt of the profi...

Page 20: ...hind like shown in the picture Plug the CPU between the triangular positioning helps to the slot marked with CPU SPEED7 and pull it down 2 Fix the CPU by screwing Repeat this procedure with the peripheral modules by clicking a backplane bus coupler stick the module right from the modules you ve already fixed click it down wards and connect it with the backplane bus coupler of the last module and b...

Page 21: ...installed on a profile rail and connected via the backplane bus connector Before installing the modules you have to clip the backplane bus con nector to the module from the backside The backplane bus connector is delivered together with the peripheral modules Order number A B C 390 1AB60 160 140 10 390 1AE80 482 466 8 3 390 1AF30 530 500 15 390 1AJ30 830 800 15 390 9BC00 2000 Drillings only left 1...

Page 22: ...r device plate please look for a low impe dance connection between profile rail and background 3 Connect the profile rail with the protected earth conductor For this purpose there is a bolt with M6 thread 4 The minimum cross section of the cable to the protected earth conductor has to be 10mm2 5 Stick the power supply to the profile rail and pull it to the left side to the grounding bolt of the pr...

Page 23: ...by clicking a backplane bus connector stick the module right from the modules you ve already fixed click it downwards and connect it with the backplane bus connector of the last module and bolt it VIPA System 300S Assembly and installation guidelines Assembly standard bus HB140 CPU 314 6CF23 en 19 01 23 ...

Page 24: ...ection of 0 08mm2 to 2 5mm2 may be connected You can use flexible wires without end case as well as stiff wires 1 Test point for 2mm test tip 2 Locking orange for screwdriver 3 Round opening for wires The picture on the left side shows the cabling step by step from top view 1 For cabling you push the locking vertical to the inside with a suiting screwdriver and hold the screwdriver in this positio...

Page 25: ...ith the cabling from bottom to top res from top to bottom if the cables should be led out at the top 5 Bolt also the connection screws of not cabled screw clamps 6 Put the included cable binder around the cable bundle and the front connector 7 Fix the cable binder for the cable bundle 8 Bolt the fixing screw of the front connector 9 Now the front connector is electrically connected with your modul...

Page 26: ...terference cause interferences to your control occur by means of different coupling mechanisms There are n galvanic coupling n capacitive coupling n inductive coupling n radiant coupling In the most times it is enough to take care of some elementary rules to guarantee the EMC Please regard the following basic rules when installing your PLC n Take care of a correct area wide grounding of the inacti...

Page 27: ...tor is impedance low because otherwise the interference currents may appear as interference cause When isolating cables you have to regard the following n If possible use only cables with isolation tangle n The hiding power of the isolation should be higher than 80 n Normally you should always lay the isolation of cables on both sides Only by means of the both sided connection of the isolation you...

Page 28: ...ory cards lockable n Status LEDs for operating state and diagnostics n Real time clock battery buffered n Fast digital I Os DI 8xDC24V DIO 8xDC 24V 0 5A n Analog I Os AI 4x12Bit AO 2x12Bit AI 1xRTD n 4 counter 100kHz n I O address range digital analog 8191byte n 512 timer n 512 counter n 8192 flag byte Type Order number Description CPU 314ST 314 6CF23 SPEED Bus MPI interface card slot real time cl...

Page 29: ...t 4 LEDs of the I O part 5 Operating mode switch CPU 6 X1 Slot for DC 24V power supply 7 X5 Ethernet PG OP channel 8 X2 MPI interface 9 X3 PB DP PtP interface The components 6 9 are under the front flap 4 2 2 Interfaces CPU 314 6CF23 VIPA System 300S Hardware description Structure Interfaces HB140 CPU 314 6CF23 en 19 01 29 ...

Page 30: ...igurable connections are not possible n For online access to the CPU via Ethernet PG OP channel valid IP address parame ters have to be assigned to this 9pin SubD jack The CPU has a PROFIBUS PtP interface with a fix pinout After an overall reset the inter face is deactivated By appropriate configuration the following functions for this interface may be enabled n PROFIBUS DP master operation Config...

Page 31: ...chargeable battery is installed on every CPU to safeguard the contents of the RAM when power is removed This battery is also used to buffer the internal clock The rechargeable battery is maintained by a charging circuit that receives its power from the internal power supply and that maintain the clock and RAM for a max period of 30 days Please connect the CPU at least for 24 hours to the power sup...

Page 32: ...Phase 1 Initialization Phase 2 Initialization Phase 3 Initialization Phase 4 Operation X X X CPU is in STOP state 2Hz X X X CPU is in start up state As long as the OB 100 is processed the RUN LED blinks for at least 3s X X CPU is in state RUN without error X X X X There is a system fault More information can be found in the diagnostics buffer of the CPU X X X X Variables are forced X X X X Accessi...

Page 33: ...it The Ethernet interface of the Ethernet PG OP channel has a transfer rate of 10Mbit not relevant X Dependent on the mode of operation the LEDs show information about the state of oper ation of the PROFIBUS part according to the following pattern Master operation RN RUN green ER ERR red DE green IF red Meaning Master has no project this means the interface is deactivated respectively PtP is activ...

Page 34: ...tate for start command from CPU Slave operation RN RUN green ER ERR red DE green IF red Meaning Slave has no configuration respectively PtP is active 2Hz Slave is without master 2Hz 2Hz Alternate blinking at configuration faults Slave exchanges data with the master VIPA System 300S Hardware description Structure LEDs HB140 CPU 314 6CF23 en 19 01 34 ...

Page 35: ...egard that the voltage at an output channel is always the supply voltage connected to L Please regard also that due to the par allel connection of in and output channel for each group one set output can be supplied via a connected input signal A thus connected output remains active even with shut down supply voltage Non observance may cause damages of the module Overview CPU 314 6CF23 VIPA System ...

Page 36: ...1 6 Current measurement channel 1 7 Ground channel 1 8 Voltage measurement channel 2 9 Current measurement channel 2 10 Ground channel 2 11 Voltage measurement channel 3 12 Current measurement channel 3 13 Ground channel 3 14 Pt 100 channel 4 15 Pt 100 channel 4 16 Output channel 5 17 Ground output channel 5 18 Output channel 6 19 Ground output channel 6 20 Ground power supply AIO VIPA System 300S...

Page 37: ... error 22 I 0 0 Counter 0 A 23 I 0 1 Counter 0 B 24 I 0 2 Gate0 Latch0 Reset0 25 I 0 3 Counter 1 A 26 I 0 4 Counter 1 B 27 I 0 5 Gate1 Latch1 Reset1 28 I 0 6 Counter 2 A 29 I 0 7 Counter 2 B 30 Ground 1M DI 31 Power supply 2L DC 24 V DIO 32 I Q 1 0 Gate2 Latch2 Reset2 33 I Q 1 1 Counter 3 A 34 I Q 1 2 Counter 3 B 35 I Q 1 3 Gate3 Latch3 Reset3 36 I Q 1 4 OUT0 Latch0 Reset0 37 I Q 1 5 OUT1 Latch1 R...

Page 38: ...Reverse polarity protection of rated load voltage ü Current consumption from load voltage L without load 70 mA Rated value DC 24 V Input voltage for signal 0 DC 0 5 V Input voltage for signal 1 DC 15 28 8 V Input voltage hysteresis Signal logic input Sinking input Frequency range Input resistance Input current for signal 1 6 mA Connection of Two Wire BEROs possible ü Max permissible BERO quiescent...

Page 39: ...nt permitted range to 40 C 5 mA to 0 6 A Output current permitted range to 60 C 5 mA to 0 6 A Output current at signal 0 max residual current 100 µA Output delay of 0 to 1 100 µs Output delay of 1 to 0 100 µs Minimum load current Lamp load 5 W Parallel switching of outputs for redundant control of a load possible Parallel switching of outputs for increased power not possible Actuation of digital i...

Page 40: ...nt range 85 Ω Input current ranges 20 mA 20 mA 0 mA 20 mA 4 mA 20 mA Operational limit of current ranges 0 3 Operational limit of current ranges with SFU Basic error limit current ranges 0 2 Radical error limit current ranges with SFU Destruction limit current inputs electrical current max 50mA Destruction limit current inputs voltage max 15V Resistance inputs ü Resistance ranges 0 600 Ohm Operati...

Page 41: ...rnal temperature compensation Technical unit of temperature measurement C Resolution in bit 12 Measurement principle Sigma Delta Basic conversion time 6 ms Noise suppression for frequency 80 dB Initial data size 10 Byte Technical data analog outputs Number of outputs 2 Cable length shielded 200 m Rated load voltage DC 24 V Reverse polarity protection of rated load voltage ü Current consumption fro...

Page 42: ...ive load 0 5 ms Settling time for inductive load 0 75 ms Resolution in bit 12 Conversion time 1 ms Substitute value can be applied yes Output data size 4 Byte Technical data counters Number of counters 4 Counter width 32 Bit Maximum input frequency 100 kHz Maximum count frequency 100 kHz Mode incremental encoder ü Mode pulse direction ü Mode pulse ü Mode frequency counter Mode period measurement G...

Page 43: ...Diagnostics information read out possible Supply voltage display green LED Group error display red SF LED Channel error display red LED per group Isolation Between channels ü Between channels of groups to 8 Between channels and backplane bus ü Between channels and power supply Max potential difference between circuits DC 75 V AC 50 V Max potential difference between inputs Ucm Max potential differ...

Page 44: ...mber of data blocks 4095 Max data blocks size 64 KB Max local data size per execution level 1024 Byte Blocks Number of OBs 23 Number of FBs 2048 Number of FCs 2048 Maximum nesting depth per priority class 8 Maximum nesting depth additional within an error OB 4 Time Real time clock buffered ü Clock buffered period min 6 w Accuracy max deviation per day 10 s Number of operating hours counter 8 Clock...

Page 45: ...ication ü Number of GD circuits max 4 Size of GD packets max 22 Byte S7 basic communication ü S7 basic communication user data per job 76 Byte S7 communication ü S7 communication as server ü S7 communication as client S7 communication user data per job 160 Byte Number of connections max 32 PWM data PWM channels PWM time basis Period length Minimum pulse width Type of output Functionality Sub D int...

Page 46: ...24V DC Power supply max 100mA non isolated Functionality MPI Number of connections max 32 PG OP channel ü Routing ü Global data communication ü S7 basic communication ü S7 communication ü S7 communication as server ü S7 communication as client Transmission speed min 19 2 kbit s Transmission speed max 12 Mbit s Functionality PROFIBUS master Number of connections max 32 PG OP channel ü Routing ü S7 ...

Page 47: ...communication ü S7 communication as server ü S7 communication as client Direct data exchange slave to slave communication DPV1 ü Transmission speed min 9 6 kbit s Transmission speed max 12 Mbit s Automatic detection of transmission speed Transfer memory inputs max 244 Byte Transfer memory outputs max 244 Byte Address areas max 32 User data per address area max 32 Byte Functionality RJ45 interfaces...

Page 48: ...ocol ü RK512 protocol USS master protocol ü Modbus master protocol ü Modbus slave protocol Special protocols Housing Material PPE Mounting Rail System 300 Mechanical data Dimensions WxHxD 80 mm x 125 mm x 120 mm Net weight 480 g Weight including accessories Gross weight Environmental conditions Operating temperature 0 C to 60 C Storage temperature 25 C to 70 C Certifications UL certification yes K...

Page 49: ...ansferred from the memory card into the work memory of the CPU If no memory card is plugged the CPU transfers permanent stored protected blocks into the work memory if available n Depending on the position of the operating mode switch the CPU switches to RUN if OB 81 exists res remains in STOP This event is stored in the diagnostic buffer as Start overall reset automatically unbuffered PowerON CAU...

Page 50: ...modules you may use line interface connec tions For this you set in the hardware configurator the module IM 360 from the hardware catalog to slot 3 of your 1 profile rail Now you may extend your system with up to 3 pro file rails by starting each with an IM 361 from Siemens at slot 3 Considering the max total current with the CPU 314 6CF23 from VIPA up to 32 modules may be arranged in a row Here t...

Page 51: ...ED Bus Depending on the slot location the start address from where on the according module is stored in the address range is calculated with the following formulas Standard Bus n DIOs Start address 4 slot 1 n AIOs FMs CPs Start address 16 slot 1 256 SPEED Bus n DIOs Start address 4 slot 101 128 n AIOs FMs CPs Start address 256 slot 101 2048 Automatic addressing VIPA System 300S Deployment CPU 314 ...

Page 52: ...e functionality of the automatic address allocation sepa rated for standard bus and SPEED Bus Example for automatic address allocation VIPA System 300S Deployment CPU 314 6CF23 Addressing Addressing HB140 CPU 314 6CF23 en 19 01 52 ...

Page 53: ...DI_1 1 Digital input I 1 0 I 1 7 2 2 reserved 4 AI_CH0 2 Analog input CH0 6 AI_CH1 2 Analog input CH1 8 AI_CH2 2 Analog input CH2 10 AI_CH3 2 Analog input CH3 12 AI_CH4 2 Analog input CH4 14 2 reserved 16 CVCL_0 4 Counter Latch value 0 20 2 reserved 22 ISTS_0 2 Input status counter 0 24 CVCL_1 4 Counter Latch value 1 28 2 reserved 30 ISTS_1 2 Input status counter 1 32 CVCL_2 4 Counter Latch value ...

Page 54: ...ens hardware configurator is required Please consider that this SPEED7 CPU has 4 ACCUs After an arithmetic operation I I I I D D D D MOD R R R R the content of ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2 This may cause con flicts in applications that presume an unmodified ACCU 2 For more information may be found in the manual VIPA Operation list SPEED7 at Differences between SPEED7 and 300V prog...

Page 55: ...to the original CPU type Switching n CPU type 318 Switching takes place with the CMD auto command CPUTYPE_318 After this perform a power cycle Ä Chap 5 18 CMD auto commands page 88 CMD_START CPUTYPE_318 CMD_END n CPU type original The reset to the original type takes place with the CMD auto command CPU TYPE_ORIGINAL respectively by Ä Chap 5 15 Reset to factory settings page 84 Ä Chap 5 18 CMD auto...

Page 56: ...tion of the line connections IM 360 361 from Siemens is not required 5 6 Hardware configuration Ethernet PG OP channel The CPU 314 6CF23 has an integrated Ethernet PG OP channel This channel allows you to program and remote control your CPU The PG OP channel also gives you access to the internal web page that contains information about firmware version connected I O devices current cycle times etc...

Page 57: ...IP configuration like IP address subnet mask and gateway 6 Confirm with Assign IP configuration ð Direct after the assignment the Ethernet PG OP channel may be reached online by these address data The value remains as long as it is reassigned it is over written by a hardware configuration or an factory reset is executed 1 Open the Siemens hardware configurator und configure the Siemens CPU 317 2DP...

Page 58: ...www vipa com at the service area The integration of the SPEEDBUS GSD takes place with the following proceeding 1 Go to the service area of www vipa com 2 Load from the download area at Config files è PROFIBUS the according file for your System 300S 3 Extract the file to your work directory 4 Start the hardware configurator from Siemens 5 Close every project 6 Select Options è Install new GSD file ...

Page 59: ... CP from Siemens for each SPEED Bus CP a corresponding Siemens CP is to be placed and linked at the standard bus More information about the configuration of the according SPEED Bus module may be found in the according manual 5 8 Setting standard CPU parameters 5 8 1 Parameterization via Siemens CPU Since the CPU 314 6CF23 is to be configured as Siemens CPU 317 2DP 6ES7 317 2AK14 0AB0 V3 3 in the S...

Page 60: ... the time the moni toring time has expired the actual configuration becomes unequal to the preset con figuration Monitoring time for ready message by modules 100ms n Transfer of parameters to modules 100ms The maximum time for the transfer of parameters to parameterizable modules If not every module has been assigned parameters by the time this monitoring time has expired the actual configuration ...

Page 61: ...n Enter the time intervals in ms in which the watchdog interrupt OBs should be processed The start time for the clock is when the operating mode switch is moved from STOP to RUN n Phase offset Enter the delay time in ms for current execution for the watch dog inter rupt This should be performed if several watchdog interrupts are enabled Phase offset allows to distribute processing time for watchdo...

Page 62: ...here In the case of an error the CPU is informed via this address n Operating mode Here the operating mode of the PROFIBUS part may be preset More may be found at chapter Deployment PROFIBUS Communication n Configuration Within the operating mode DP Slave you may configure your slave system More may be found at chapter Deployment PROFIBUS communication n Clock These parameters are not supported 5 ...

Page 63: ...ed in a PROFIBUS master system and the appropriate parameters may be set after installation The GSD Geräte Stamm Datei is online available in the following language versions Further language versions are available on inquires Name Language SPEEDBUS GSD German default SPEEDBUS GSG German SPEEDBUS GSE English The GSD files may be found at www vipa com at the service area The integration of the SPEED...

Page 64: ...IPA specific parameters The following parameters may be accessed by means of the properties dialog of the VIPA CPU 5 9 2 1 Function RS485 X3 Using this parameter the RS485 interface may be switched to PtP communication point to point respectively the synchronization between DP master system and CPU may be set Deactivated Deactivates the RS485 interface PtP With this operating mode the PROFIBUS DP ...

Page 65: ...d DP master system are waiting on each other and form thereby a cycle Here the whole cycle is the sum of the longest DP master cycle and CPU cycle By this synchronization mode you receive global consistent in output data since within the total cycle the same input and output data are handled suc cessively by CPU and DP master system If necessary the time of the Watchdog of the bus parameters shoul...

Page 66: ...ry bytes starting with MB0 set at the parameters of the Siemens CPU is used Otherwise the adjusted value 1 8192 is used Default 0 5 9 2 4 Phase offset and execution of OB 33 and OB 34 The CPU offers additional cyclic interrupts which interrupt the cyclic processing in certain distances Point of start of the time interval is the change of operating mode from STOP to RUN To avoid that the cyclic int...

Page 67: ...tructure of a PROFIBUS net This means the same rules are valid and you use the same components for the build up The single participants are connected with each other via bus interface plugs and PROFIBUS cables Per default the MPI net runs with 187 5kbaud VIPA CPUs are deliv ered with MPI address 2 The MPI programming cables are available at VIPA in different variants The cables pro vide a RS232 re...

Page 68: ...IC Manager 3 Choose in the menu Options è Set PG PC interface 4 Select in the according list the PC Adapter PROFIBUS if appropriate you have to add it first then click at Properties 5 Set in the register PROFIBUS the transfer parameters of your PROFIBUS net and enter a valid PROFIBUS address The PROFIBUS address must be assigned to the DP master by a project before 6 Switch to the register Local c...

Page 69: ...in the CPU after transfer 5 10 3 Transfer via memory card The memory card serves as external storage medium There may be stored several proj ects and sub directories on a memory card Please regard that your current project is stored in the root directory and has one of the following file names n S7PROG WLD n AUTOLOAD WLD 1 Start the Siemens SIMATIC Manager with your project 2 Create with File è Me...

Page 70: ...s which are connected to the CPU The web page only shows information The shown values cannot be changed CPU Here order number serial number and the version of firmware and hardware of the CPU are listed Expert View takes you to the advanced Expert View Info Expert View Runtime Information Operation Mode STOP CPU Status information Mode Switch RUNP System Time 01 09 09 00 35 30 812 CPU Date time OB...

Page 71: ...PA 314 6CF23 CPU Ethernet PG OP channel IP Address 172 16 129 210 Address information Subnet Mask 255 255 255 0 Gateway Address 172 16 129 210 MAC Address 00 20 D5 77 30 36 CPU Firmware Information File System V1 0 2 Information for the support PRODUCT VIPA 314 6CF23 V3 7 5 Px000305 pkg Name firmware version package HARDWARE V0 1 0 0 5679H V20 HX000027 110 CPU Information for the support Bx000227 ...

Page 72: ... Module Firmware Information PRODUCT VIPA 342 1DA70 3 3 5 Px000182 pkg Name firmware version package BB000218 V5 3 0 0 Information for support AB000068 V4 1 7 0 Runtime Information Cycle Time cur 0us min 65535000us max 0us avg 0us cnt 0 CPU cycle time min minimal cur current max maximal Info Overview VIPA System 300S Deployment CPU 314 6CF23 Accessing the web server HB140 CPU 314 6CF23 en 19 01 72...

Page 73: ...VIPA DI8 DIO8 V3 2 9 0 Name firmware version Data Input data Offset Width Value dec Value hex 124 1 0 00 125 1 0 00 Data Output data Offset Width Value dec Value hex New Value hex 124 1 0 00 00 125 1 0 00 00 CPU component Analog I O Info Overview Info Overview VIPA System 300S Deployment CPU 314 6CF23 Accessing the web server HB140 CPU 314 6CF23 en 19 01 73 ...

Page 74: ...ion Hx000041 V1 6 0 0 Data AI5 10byte Offset Width Value dec Value hex 752 1 255 ff 753 1 240 f0 754 1 0 00 755 1 0 00 756 1 0 00 757 1 0 00 758 1 0 00 759 1 0 00 760 1 127 7f 761 1 255 ff 55dd0002 Data AO2 4byte Offset Width Value dec Value hex New Value hex 752 1 0 00 753 1 0 00 754 1 0 00 755 1 0 00 VIPA System 300S Deployment CPU 314 6CF23 Accessing the web server HB140 CPU 314 6CF23 en 19 01 ...

Page 75: ... 22 0 Name firmware version Data Input data 16byte Offset Width Value dec Value hex 768 1 0 00 769 1 0 00 770 1 0 00 771 1 0 00 772 1 0 00 773 1 0 00 774 1 0 00 775 1 0 00 776 1 0 00 777 1 0 00 778 1 0 00 779 1 0 00 780 1 0 00 781 1 0 00 782 1 0 00 783 1 0 00 Info Overview VIPA System 300S Deployment CPU 314 6CF23 Accessing the web server HB140 CPU 314 6CF23 en 19 01 75 ...

Page 76: ... 0 00 774 1 0 00 775 1 0 00 776 1 0 00 777 1 0 00 778 1 0 00 779 1 0 00 780 1 0 00 781 1 0 00 782 1 0 00 783 1 0 00 VBUS Digital In Out 16 Data Input data Offset Width Value dec Value hex 0 1 0 00 1 1 0 00 Info Overview VIPA System 300S Deployment CPU 314 6CF23 Accessing the web server HB140 CPU 314 6CF23 en 19 01 76 ...

Page 77: ...Data Output data Offset Width Value dec Value hex New Value hex 0 1 0 00 00 1 1 0 00 00 VIPA System 300S Deployment CPU 314 6CF23 Accessing the web server HB140 CPU 314 6CF23 en 19 01 77 ...

Page 78: ...P due to an error This indicates the start up n STOP LED off When the CPU has completed the START UP OB it assumes the operating mode RUN n The application program in OB 1 is processed in a cycle Under the control of alarms other program sections can be included in the cycle n All timers and counters being started by the program are active and the process image is updated with every cycle n The BA...

Page 79: ...gram until the next breakpoint via Debug è Resume 7 Delete all breakpoints with the option Debug è Delete All Breakpoints n The RUN LED blinks and the STOP LED is on n The execution of the code is stopped No level is further executed n All times are frozen n The real time clock runs is just running n The outputs were disabled BASP is activated n Configured CP connections remain exist The usage of ...

Page 80: ...4 20mA issue 4mA If configured also substitute values may be issued decentral outputs Same behavior as the central digital analog outputs decentral inputs The inputs are cyclically be read by the decentralized station and the recent values are put at disposal STOP RUN res PowerON general First the PII is deleted then OB 100 is called After the execution of the OB the BASP is reset and the cycle st...

Page 81: ...connected to your CPU 1 For an overall reset the CPU must be switched to STOP state You may place the CPU in STOP by the menu command PLC è Operating mode 2 You may request the overall reset by means of the menu command PLC è Clean Reset ð A dialog window opens Here you can bring your CPU in STOP state if not already done and start the overall reset During the overall reset procedure the ST LED bl...

Page 82: ...ware release 01 Px000305 pkg n PROFIBUS DP master Px000182 pkg n DI DO AIO Px000244 pkg CAUTION When installing a new firmware you have to be extremely careful Under certain circumstances you may destroy the CPU for example if the voltage supply is interrupted during transfer or if the firmware file is defective In this case please call the VIPA Hotline Please regard that the version of the update...

Page 83: ...d FC shows that at least a more current firmware file was found at the memory card 5 You start the transfer of the firmware as soon as you tip the operating mode switch downwards to MR within 10s and then leave the switch in STOP position ð During the update process the LEDs SF and FC are alternately blinking and the MC LED is on This may last several minutes 6 The update is successful finished wh...

Page 84: ... and blinking Start here to count the static light of the ST LED 3 After the 6 Static light release the operating mode switch and tip it downwards to MR ð For the confirmation of the resetting procedure the green RN LED lights up once This means that the RAM was deleted completely If the ST LED is on only an overall reset has been performed and the reset to factory setting has been failed In this ...

Page 85: ...ively an overall reset the CPU checks if there is a memory card plugged with data valid for the CPU n Push the memory card into the slot until it snaps in leaded by a spring mechanism This ensures contacting By sliding down the sliding mechanism a just installed memory card can be protected against drop out To remove slide the sliding mechanism up again and push the storage media against the sprin...

Page 86: ...guration The activation code is fixed to the MCC by means of an unique serial number Here the functionality as an external memory card is not affected To the following times an access takes place on a storage medium After overall reset n The CPU checks if a MCC is plugged If so the according additional memory is unlocked n The CPU checks whether a project S7PROG WLD exists If so it is automaticall...

Page 87: ...e from the project to the file window of protect wld 4 Transfer the file protect wld to a memory card 5 Plug the memory card into the CPU and execute an overall reset Ä Chap 5 13 Overall reset page 81 ð The overall reset stores the blocks in protect wld permanently in the CPU pro tected from accesses of 3 persons Protected blocks are overwritten by a new protect wld Using a PG 3 persons may access...

Page 88: ... file located after the command is loaded else s7prog wld is loaded 0xE805 SAVE_PROJECT The recent project blocks and hardware configuration is stored as s7prog wld at the memory card If the file just exists it is renamed to s7prog old If your CPU is password protected so you have to add this as parameter Otherwise there is no project written Example SAVE_PROJECT password 0xE806 FACTORY_RESET Exec...

Page 89: ...ND is not evaluated Example 2 CMD_START Marks the start of the command sequence 0xE801 LOAD_PROJECT proj2 wld Execute an overall reset and load proj2 wld 0xE805 WAIT1SECOND Wait ca 1s 0xE803 WAIT1SECOND Wait ca 1s 0xE803 IP parameter 0xE80E SET_NETWORK 172 16 129 210 255 255 224 0 172 16 129 210 WAIT1SECOND Wait ca 1s 0xE803 WAIT1SECOND Wait ca 1s 0xE803 SET_MPI_ADDRESS 4 MPI address 4 is set 0xE8...

Page 90: ...status of the operands and the RLO can be displayed by means of the test func tion PLC è Monitor Modify Variables n This test function displays the current status and the RLO of the different operands while the program is being executed n It is also possible to enter corrections to the program n The processing of the states may be interrupted by means of jump commands or by timer and process relat...

Page 91: ...al operands is modified independently of the operating mode of the CPU When the operating mode is RUN the program is executed with the modified process variable When the program continues they may however be modified again without notification n Forcing variables You can pre set individual variables of a user program with fixed values so that they can not be changed or overwritten by the user prog...

Page 92: ...rdware configuration available the in and output areas starting with address 1024 are mapped to the address range of the CPU In the following these areas are more described Otherwise the project engineering takes place after installing the SPEEDBUS GSD in the Siemens SIMATIC Manager The counters used here are endless counter where the control happens via the digital input channels For the counter ...

Page 93: ... regard that the voltage at an output channel is always the supply voltage connected to L Please regard also that due to the par allel connection of in and output channel for each group one set output can be supplied via a connected input signal A thus connected output remains active even with shut down supply voltage Non observance may cause damages of the module Overview CPU 314 6CF23 VIPA Syste...

Page 94: ...el 1 6 Current measurement channel 1 7 Ground channel 1 8 Voltage measurement channel 2 9 Current measurement channel 2 10 Ground channel 2 11 Voltage measurement channel 3 12 Current measurement channel 3 13 Ground channel 3 14 Pt 100 channel 4 15 Pt 100 channel 4 16 Output channel 5 17 Ground output channel 5 18 Output channel 6 19 Ground output channel 6 20 Ground power supply AIO VIPA System 3...

Page 95: ... 4 OUT0 Latch0 Reset0 37 I Q 1 5 OUT1 Latch1 Reset1 38 I Q 1 6 OUT2 Latch2 Reset2 39 I Q 1 7 OUT3 Latch3 Reset3 40 Ground 2M DIO 6 3 Address assignment I O part n By including the SPEEDBUS GSD in your hardware configurator the module is at your disposal in the hardware catalog After the installation of the GSD you will find the CPU 314 6CF23 at Additional field devices è I O è VIPA_SpeedBus n In c...

Page 96: ... 1 DO_1 1 Digital output Q 1 0 Q 1 7 2 2 reserved 4 AO_CH0 2 Analog output CH0 6 AO_CH1 2 Analog output CH1 8 2 reserved 10 OSTS_0 2 Output status counter 0 12 2 reserved 14 OSTS_1 2 Output status counter 1 16 2 reserved 18 OSTS_2 2 Output status counter 2 20 2 reserved 22 OSTS_3 2 Output status counter 3 6 4 Analog part The analog part consists of 4 input 1 Pt100 and 2 output channels 10byte inpu...

Page 97: ...l 4 15 Pt 100 channel 4 16 Output channel 5 17 Ground output channel 5 18 Output channel 6 19 Ground output channel 6 20 Ground power supply AIO n By including the SPEEDBUS GSD in your hardware configurator the module is at your disposal in the hardware catalog After the installation of the GSD you will find the CPU 314 6CF23 at Additional field devices è I O è VIPA_SpeedBus n If there is no hardw...

Page 98: ... output value at 60Hz X 13bit sign sign Relevant output value at 120Hz X X 11bit sign sign Relevant output value at 170Hz X X X X 9bit sign sign Relevant output value at 200Hz X X X X X X For the sign bit is valid n Bit 15 0 à positive value n Bit 15 1 à negative value As soon as a measuring value exceeds overrange respectively unterrange the following value is returned n Measured value overrange ...

Page 99: ...nge Conversion 10V 11 76V 32511 7EFFh overrange 10V 27648 6C00h nominal range 5V 13824 3600h 0V 0 0000h 5V 13824 CA00h 10V 27648 9400h 11 76 32512 8100h underrange Measuring range Voltage U Decimal D Hex Range Conversion 0 10V 11 76V 32511 7EFFh overrange 10V 27648 6C00h nominal range 5V 13824 3600h 0V 0 0000h 1 76V 4864 ED00h underrange Measuring range Current I Decimal D Hex Range Conversion 0 2...

Page 100: ...27648 9400h 23 52mA 32512 8100h underrange 6 5 Analog part Parametrization 18Byte of parameter data are available for the configuration By using the record set B4h of the SFC 55 WR_PARM you may alter the parametrization in the module during run time The time needed until the new parametrization is valid can last up to 50ms During this time the measuring value output is 7FFFFh The following table s...

Page 101: ...ge 103 19h 3 Channel 1 Function Ä Input area channel 0 3 page 103 19h 4 Channel 2 Function Ä Input area channel 0 3 page 103 19h 5 Channel 3 Function Ä Input area channel 0 3 page 103 19h 6 Channel 4 Function Ä Input area channel 4 page 104 00h 7 Channel 0 Measuring cycle Ä Structure measuring cycle byte page 103 00h 8 Channel 1 Measuring cycle Ä Structure measuring cycle byte page 103 00h 9 Chann...

Page 102: ...pt The diagnostic interrupt is global released for the digital and analog part Ä Chap 6 10 Counter Parametrization page 114 In case of an error like e g wire break the superordinated system receives record set 0 For a channel specific diagnostic you may then call record set 1 n CPU Stop reaction and substitute value Via byte 14 17 you predefine a substitute value for the output channel as soon as ...

Page 103: ...s complement 18h Voltage 0 10V S7 format from Siemens 0 11 76V 11 76V End overdrive region 32511 0 10V Nominal range 0 27648 no underdrive region available 24h Current 20mA S7 format from Siemens 23 52mA 23 52mA End overdrive region 32511 20 20mA Nominal range 27648 27648 23 52mA End underdrive region 32512 two s complement 23h Current 4 20mA S7 format from Siemens 1 185 22 81mA 22 81mA End overdr...

Page 104: ...erdrive region 2700 50 250 C Nominal range 500 2500 105 C End underdrive region 1050 two s complement 46h Resistance measurement 600Ω 2wire 0 705 5Ω 705 5Ω End overdrive region 32511 0 600Ω Nominal range 0 27648 no underdrive region available 00h Channel not active turned off Output area channel 5 channel 6 No Function Output area 19h Voltage 10V S7 format from Siemens 11 76V 11 76V End overdrive ...

Page 105: ...rupt release in the parametrization the following events can release a diagnostic interrupt n Wire break n Parametrization error n Measuring range underflow n Measuring range overflow At a pending diagnostic the CPU interrupts the user application and jumps to the OB 82 for diagnosticincoming This OB allows you with an according programming to monitor detailed diagnostic information via the SFCs 5...

Page 106: ...till active Record set 0 diagnosticoutgoing Byte Bit 7 0 0 00h fix 1 n Bit 3 0 Module class 0101b analog module n Bit 4 Channel information available n Bit 7 5 reserved 2 00h fix 3 00h fix Record set 1 channel specific diagnosticincoming Byte 0 14 Byte Bit 7 0 1 3 Content record set 0 Ä Record set 0 diagnosticincoming page 106 4 n Bit 6 0 Channel type here 74h 70h Digital input 71h Analog input 72...

Page 107: ...e underflow channel 1 n Bit 7 Measuring range overflow channel 1 10 n Bit 0 Parametrization error channel 2 n Bit 1 0 fix n Bit 2 0 fix n Bit 3 0 fix n Bit 4 Wire break channel 2 n Bit 5 0 fix n Bit 6 Measuring range underflow channel 2 n Bit 7 Measuring range overflow channel 2 11 n Bit 0 Parametrization error channel 3 n Bit 1 0 fix n Bit 2 0 fix n Bit 3 0 fix n Bit 4 Wire break channel 3 n Bit ...

Page 108: ...s counter with max 100kHz n The output channels provide a diagnostic function i e as soon as an output is active the concerning input is set to 1 n At a short circuit at the load the input is set to 0 and the error may be recognized by evaluating the input n The DIO area has to be provided with external DC 24V CAUTION Please regard that the voltage at an output channel is always the supply voltage...

Page 109: ...Reset1 38 I Q 1 6 OUT2 Latch2 Reset2 39 I Q 1 7 OUT3 Latch3 Reset3 40 Ground 2M DIO n By including the SPEEDBUS GSD in your hardware configurator the module is at your disposal in the hardware catalog After the installation of the GSD you will find the CPU at Additional field devices è I O è VIPA_SpeedBus 314 6CF23 n If there is no hardware configuration available the in and output areas starting ...

Page 110: ...h counter n During the count process the counter signal is recognized and evaluated n Every counter occupies one double word in the input address area with the counter register and in the input and output area one word for the status By including the SPEEDBUS GSD you may pre set all counter parameters via a hard ware configuration Except of the parameter in record set 0 you may change parameters d...

Page 111: ...ing inputs are available n Counterx A Pulse input for counter signal respectively track A of an encoder Here you may connect encoder with 1 2 or 4 tier evaluation n Counterx B Direction signal respectively track B of the encoder Via the parametrization you may invert the direction signal The following inputs may be assigned to a pin at the module via parametrization n Gatex This input allows you t...

Page 112: ...nter value latch value counter 0 20 2 reserved 22 ISTS_0 2 Input status counter 0 24 CVCL_1 4 Counter value latch value counter 1 28 2 reserved 30 ISTS_1 2 Input status counter 1 32 CVCL_2 4 Counter value latch value counter 2 36 2 reserved 38 ISTS_2 2 Input status counter 2 40 CVCL_3 4 Counter value latch value counter 3 44 2 reserved 46 ISTS_3 2 Input status counter 3 Used area Ä Output area pag...

Page 113: ...bit is never set 10 STS_END Is set when counter value end value 11 STS_OFLW Is set at overflow 12 STS_UFLW Is set at underflow 13 STS_ZP Is set at zero crossing 14 STS_L n 0 Latch input is not active n 1 Latch input is active 15 NEW_L Is set if value in the latch register has changed The bits remain set until reset with RES_STS output status bit 6 After setting a bit in the output status word this...

Page 114: ...interrupt 16 80h Edge selection for process interrupt 32 81h Filter value I 0 0 I 1 7 16 82 86h C0 Comparison set end value hysteresis pulse 16 87h C0 Sum parameter comparison set end value hysteresis and pulse 16 88 8Ch C1 Comparison set end value hysteresis pulse 16 8Dh C1 Sum parameter comparison set end value hysteresis and pulse 16 8E 92h C2 Comparison set end value hysteresis pulse 16 93h C2...

Page 115: ...o the digital part For this you have to transfer the wanted parameters via record set to the counter by using the according SFC in the user application Byte Bit 7 0 0 3 Counter mode C0 4 7 Counter mode C1 8 11 Counter mode C2 12 15 Counter mode C3 n Via the record set 0 you may preset a counter mode for every counter as double word n Record set 0 may not be transferred during runtime Record set 0 ...

Page 116: ...itive level at input resets counterX n Bit 7 Gate function internal gate 0 abort count process starts again at load value 1 interrupt count process continues with counter value 1 n Bit 2 0 Output set OUTX of counterX is set when condition is met 000b never 001b counter value comparison value 010b counter value comparison value 100b counter value comparison value n Bit 3 Count direction 0 Count dir...

Page 117: ...a process interrupt execution another process interrupt is initialized for the same event Byte Bit 7 0 0 n Bit 1 0 Edge selection I 0 0 n Bit 7 2 reserved 1 n Bit 1 0 Edge selection I 0 1 n Bit 7 2 reserved 2 n Bit 1 0 Edge selection I 0 2 n Bit 7 2 reserved 3 n Bit 1 0 Edge selection I 0 3 n Bit 7 2 reserved 4 n Bit 1 0 Edge selection I 0 4 n Bit 7 2 reserved 5 n Bit 1 0 Edge selection I 0 5 n Bi...

Page 118: ...t at edge 1 0 11b Hardware interrupt at edge 0 1 and 1 0 Byte Bit 15 0 0 1 n Input filter I 0 0 in 2 56ms 2 3 n Input filter I 0 1 in 2 56ms 4 5 n Input filter I 0 2 in 2 56ms 6 7 n Input filter I 0 3 in 2 56ms 8 9 n Input filter I 0 4 in 2 56ms 10 11 n Input filter I 0 5 in 2 56ms 12 13 n Input filter I 0 6 in 2 56ms 14 15 n Input filter I 0 7 in 2 56ms 16 17 n Input filter I 1 0 in 2 56ms 18 19 ...

Page 119: ...t when compared with the recent counter value The behavior of the output respectively the process interrupt has to be set via the record set 0 n Load value end value You may define a main counting direction for every counter via the parametriza tion If none or endless is chosen the complete counting range is available Lower counter limit 2 147 483 648 231 Upper counter limit 2 147 483 648 231 1 Ot...

Page 120: ...ia the parameterization you have the opportunity to define a main counting direction for every counter If none is chosen the complete counting range is available Limits Valid value range Lower count limit 2 147 483 648 231 Upper count limit 2 147 483 647 231 1 Main counting direction forward Upper restriction of the count range The counter counts 0 res load value in positive direction until the pa...

Page 121: ...til these are reset with RES_STS If enabled additionally a process interrupt is triggered No main counting direction n The counter counts once starting with the load value n You may count forward or backwards n The count limits are set to the maximum count range n At over or underflow at the count limits the counter jumps to the according other count limit and the internal gate is automatically cl...

Page 122: ...ue at the next positive count pulse and the gate is automatically closed n To restart the count process you must create a positive edge of the gate The counter starts with the load value Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 VIPA System 300S Deployment I O periphery Counter Functions HB140 CPU 314 6CF23 en 19 01 122 ...

Page 123: ... counter starts with the load value Limits Valid value range Limit value 2 147 483 648 231 to 2 147 483 646 231 2 Upper count limit 2 147 483 647 231 1 No main counting direction n The counter counts forward or backwards starting with the load value n At over or underrun at the count limits the counter jumps to the according other count limit and counts from there on n The count limits are set to ...

Page 124: ...ext positive count pulse Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 Main counting direction backwards n The counter counts backwards starting with the load value n When the counter reaches the end value 1 in negative direction it jumps to the load value at the next negative count pulse n You may exceed the upper count limit V...

Page 125: ...ch register n Comparison You may set a comparison value that de activates a digital output respectively releases a process interrupt depending on the counter value n Hysteresis By specifying a hysteresis you can prevent e g a high output toggling and or trig gering interrupts when the value of an encoder signal varies to the comparison value The illustration shows how the additional functions infl...

Page 126: ...on allows you to de activate the consideration of the HW gate so that the counter activation can take place only via the SW gate The following states influence the I gate SW gate HW gate influences the I gate 0 with edge 0 1 0 1 with edge 0 1 1 with edge 0 1 1 1 with edge 0 1 0 0 with edge 0 1 de activated 1 Gate function abort and interrupt The parametrization defines if the gate interrupts or ab...

Page 127: ...it 7 3 00000b SW gate HW gate Reaction counter Edge 0 1 de activated Restart with Load value Gate control via SW gate interrupting parametrization record set 0 byte 0 bit 7 3 10000b SW gate HW gate Reaction counter Edge 0 1 de activated Continue Gate control abort inter rupt VIPA System 300S Deployment I O periphery Counter Additional functions HB140 CPU 314 6CF23 en 19 01 127 ...

Page 128: ...register n You may access the latch register via the input image For this set bit 8 of the output status word n At a new latch value additionally bit 15 is set in the input status word n By setting bit 8 in the output status word you may read the recent latch value of the according counter and reset the bit 15 of the input status word You pre define the behavior of the counter output via the param...

Page 129: ...value is in the range of the comparison value n For the hysteresis you may set a range of 0 to 255 n The settings 0 and 1 deactivate the hysteresis n The hysteresis influences zero run comparison over and underflow n An activated hysteresis remains active after a change The new hysteresis range is activated with the next hysteresis event The following pictures illustrate the output behavior for hy...

Page 130: ...aving hysteresis range and counter value comparison value 5 Counter value comparison value output is set and hysteresis activated 6 Counter value comparison value and hysteresis active output remains set 7 Leave hysteresis range and counter value comparison value output is reset With reaching the comparison condition the hysteresis gets active At active hysteresis the comparison result remains unc...

Page 131: ...ized pulse duration is put out the hysteresis is de activated With reaching the comparison condition the hysteresis gets active and a pulse of the par ameterized duration is put out As long as the counter value is within the hysteresis range no other pulse is put out With activating the hysteresis the counting direction is stored in the module If the counter value leaves the hysteresis range contr...

Page 132: ...derflow end value counter 1 n Bit 7 Counter 1 reached comparison value 11 n Bit 0 Gate counter 2 open activated n Bit 1 Gate counter 2 closed n Bit 2 Over underflow end value counter 2 n Bit 3 Counter 2 reached comparison value n Bit 4 Gate counter 3 open activated n Bit 5 Gate counter 3 closed n Bit 6 Over underflow end value counter 3 n Bit 7 Counter 3 reached comparison value 6 13 2 Diagnostic ...

Page 133: ... error cause and module address By using the SFC 59 you may read the diagnostic bytes At de activated diagnostic interrupt you have access to the last recent diagnostic event If you ve activated the diagnostic function in your hardware configuration the contents of record set 0 are already in the local double word 8 when calling the OB 82 The SFC 59 allows you to also read the record set 1 that co...

Page 134: ...formation present n Bit 7 5 0 fix 2 00h fix 3 00h fix The record set 1 contains the 4byte of the record set 0 and additionally 12byte module specific diagnostic data The diagnostic bytes have the following assignment Byte Bit 7 0 0 3 Content record set 0 Ä Record set 0 Diagnosticincoming page 133 4 n Bit 6 0 Channel type here 70h 70h Digital input 71h Analog input 72h Digital output 73h Analog out...

Page 135: ... input I 0 3 n Bit 7 0 fix 9 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 0 4 n Bit 1 0 fix n Bit 2 input I 0 5 n Bit 3 0 fix n Bit 4 input I 0 6 n Bit 5 0 fix n Bit 6 input I 0 7 n Bit 7 0 fix 10 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 1 0 n Bit 1 0 fix n Bit 2 input I 1 1 n Bit 3 0 fix n Bit 4 input I 1 2 n Bit 5 0 fix n Bit 6 Input I 1 3 n ...

Page 136: ...r 1 reached comparison value n Bit 7 0 fix 14 Diagnostic interrupt due to process interrupt lost at n Bit 0 gate counter 2 closed n Bit 1 0 fix n Bit 2 gate counter 2 opened n Bit 3 0 fix n Bit 4 over underflow end value Counter 2 n Bit 5 0 fix n Bit 6 counter 2 reached comparison value n Bit 7 0 fix 15 Diagnostic interrupt due to process interrupt lost at n Bit 0 gate counter 3 closed n Bit 1 0 f...

Page 137: ...ve to store the parameters in a DB for all protocols except ASCII The FCs SFCs are controlling the communication Send takes place via FC SFC 217 SER_SND and receive via FC SFC 218 SER_RCV The repeated call of the FC SFC 217 SER_SND delivers a return value for 3964R USS and Modbus via RetVal that con tains among other things recent information about the acknowledgement of the partner station The pr...

Page 138: ... 217 SER_SND causes a return value in RetVal that includes among others recent information about the acknowledgement of the partner n Further on for USS and Modbus after a SER_SND the acknowledgement telegram must be evaluated by a call of the FC SFC 218 SER_RCV 1 Program 2 Protocol 3 FIFO buffer 4 Interface 7 3 Deployment of RS485 interface for PtP Per default the RS485 interface is deactivated V...

Page 139: ... by means of a virtual PROFIBUS master system with the following approach 1 Perform a hardware configuration for the CPU Ä Chap 5 4 Hardware configura tion CPU page 54 2 Configure always as last module a Siemens DP master CP 342 5 342 5DA02 V5 0 Connect and parameterize it at operation mode DP Master 3 Connect the slave system VIPA_SPEEDbus After installing the SPEEDBUS GSD this may be found in th...

Page 140: ...ed pair cable n Serial bus connection in two wire technology using half duplex mode n Data communications up to a max distance of 500m n Data communication rate up to 115 2kbaud 9pin SubD jack Pin RS485 1 n c 2 M24V 3 RxD TxD P Line B 4 RTS 5 M5V 6 P5V 7 P24V 8 RxD TxD N Line A 9 n c Setting PtP parameters Properties RS485 RS485 VIPA System 300S Deployment PtP communication Deployment of RS485 int...

Page 141: ... 7 5 1 FC SFC 217 SER_SND Send to PtP This block sends data via the serial interface The repeated call of the FC SFC 217 SER_SND delivers a return value for 3964R USS and Modbus via RETVAL that con tains among other things recent information about the acknowledgement of the partner station The protocols USS and Modbus require to evaluate the receipt telegram by calling the FC SFC 218 SER_RCV after...

Page 142: ...nds for Start of Text and ETX for End of Text n Any data transferred from the periphery must be preceded by a Start followed by the data characters and the end character Depending of the byte width the following ASCII characters can be transferred 5bit not allowed 6bit 20 3Fh 7bit 20 7Fh 8bit 20 FFh n The effective data which includes all the characters between Start and End are trans ferred to th...

Page 143: ...tion The DLE duplication is reversed in the receiving station The 3964R procedure requires that a lower priority is assigned to the communication partner When communication partners issue simulta neous send commands the station with the lower priority will delay its send command The USS protocol Universelle serielle Schnittstelle universal serial interface is a serial transfer protocol defined by ...

Page 144: ...n be directed to a certain slave ore be send to all slaves as broadcast mes sage For the identification of a broadcast message you have to set bit 5 to 1 in the ADR byte Here the slave addr bit 0 4 is ignored In opposite to a normal send command the broadcast does not require a telegram evaluation via FC SFC 218 SER_RCV Only write commands may be sent as broadcast n The Modbus protocol is a commun...

Page 145: ...rite commands may be sent as broadcast Modbus offers 2 different transfer modes The mode selection happens during runtime by using the FC SFC 216 SER_CFG n ASCII mode Every byte is transferred in the 2 sign ASCII code The data are marked with a start and an end sign This causes a transparent but slow transfer n RTU mode Every byte is transferred as one character This enables a higher data pass thr...

Page 146: ...e following assign ment is valid 0x Bit area for master output data Access via function code 01h 05h 0Fh 1x Bit area for master input data Access via function code 02h 3x word area for master input data Access via function code 04h 4x word area for master output data Access via function code 03h 06h 10h A description of the function codes follows below With the following Modbus function codes a Mo...

Page 147: ...ere sent from master to slave up to their target are designated as output data OUT and contrary slave data received by the master were designated as input data IN If the slave announces an error the function code is send back with an ORed 80h Without an error the function code is sent back Slave answer Function code OR 80h Error Function code OK 1 word High byte Low byte The shown check sums CRC a...

Page 148: ...ord Respond telegram Slave address Function code Number of read bytes Data 1 word Data 2 word Check sum CRC LRC 1byte 1byte 1byte 1word 1word 1word max 125words Code 05h Write 1 bit to master output area 0x A status change is via Status bit with following values Status bit 0000h Bit 0 Status bit FF00h Bit 1 Command telegram Slave address Function code Address bit Status bit Check sum CRC LRC 1byte...

Page 149: ...um CRC LRC 1byte 1byte 1word 1word 1byte 1byte 1byte 1byte 1word max 250byte Respond telegram Slave address Function code Address 1 bit Number of bits Check sum CRC LRC 1byte 1byte 1word 1word 1word Code 10h Write n words to master output area 4x Command telegram Slave address Function code Address 1 word Number of words Number of bytes Data 1 word Data 2 word Check sum CRC LRC 1byte 1byte 1word 1...

Page 150: ...n OB 1 Call SFC 217 SER_SND where the data is send with error evaluation Here you have to build up the telegram according to the Modbus rules Call SFC 218 SER_RECV where the data is received with error evaluation 3 Execute the project engineering of the slave The PLC user application at the slave has the following structure n OB 100 Call SFC 216 configuration as Modbus RTU slave with timeout setti...

Page 151: ...VIPA System 300S Deployment PtP communication Modbus Example communication HB140 CPU 314 6CF23 en 19 01 151 ...

Page 152: ...BUS DP slaves may be coupled to the CPU The DP master communicates with the DP slaves and links up its data areas with the address area of the CPU At every POWER ON res overall reset the CPU fetches the I O mapping data from the master At DP slave failure the ER LED is on and the OB 86 is requested If this is not available the CPU switches to STOP and BASP is set As soon as the BASP signal comes f...

Page 153: ...eering a thorough knowledge of the Siemens SIMATIC Manager and the Siemens hardware configurator is required Please consider that this SPEED7 CPU has 4 ACCUs After an arithmetic operation I I I I D D D D MOD R R R R the content of ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2 This may cause con flicts in applications that presume an unmodified ACCU 2 For more information may be found in the manual...

Page 154: ...e original CPU type Switching n CPU type 318 Switching takes place with the CMD auto command CPUTYPE_318 After this perform a power cycle Ä Chap 5 18 CMD auto commands page 88 CMD_START CPUTYPE_318 CMD_END n CPU type original The reset to the original type takes place with the CMD auto command CPU TYPE_ORIGINAL respectively by Ä Chap 5 15 Reset to factory settings page 84 Ä Chap 5 18 CMD auto comm...

Page 155: ...gineering of your PROFIBUS DP master is finished Please link up now your DP slaves with periphery to your DP master 1 For the project engineering of PROFIBUS DP slaves you search the concerning PROFIBUS DP slave in the hardware catalog and drag drop it in the subnet of your master 2 Assign a valid PROFIBUS address to the DP slave 3 Link up the modules of your DP slave system in the plugged sequenc...

Page 156: ...ssembly 4 Open the properties dialog of the DP interface of the CPU by means of a double click at MPI DP 5 Set Interface type to PROFIBUS 6 Connect to PROFIBUS and preset an address e g 3 and confirm with OK 7 Switch at Operating mode to DP slave 8 Via Configuration you define the in output address area of the slave CPU which are to be assigned to the DP slave 9 Save compile and transfer your proj...

Page 157: ...2 Designate the station as DP master 3 Add your modules according to the real hardware assembly 4 Open the properties dialog of the DP interface of the CPU by means of a double click at DP 5 Set Interface type to PROFIBUS 6 Connect to PROFIBUS and preset an address e g 2 and confirm with OK 7 Switch at Operating mode to DP master and confirm the dialog with OK 8 For further configuration install t...

Page 158: ...age differences Though it is less irritable from influences than a voltage or a current interface You are able to configure the network as well linear as in a tree structure n Max 32 participants per segment are permitted Within a segment the members are linear connected The segments are connected via repeaters The maximum segment length depends on the transfer rate n PROFIBUS DP uses a transfer r...

Page 159: ...ons in mm 0 45 90 A 64 61 66 B 34 53 40 C 15 8 15 8 15 8 To connect this EasyConn plug please use the standard PROFIBUS cable type A EN50170 Starting with release 5 you also can use highly flexible bus cable Lapp cable order no 2170222 2170822 2170322 With the order no 905 6AA00 VIPA offers the EasyStrip de isolating tool that makes the connection of the EasyConn much easier Dimensions in mm The E...

Page 160: ...nd deployment of the terminating resistors is delivered with the connector 1 Loosen the screw 2 Lift contact cover 3 Insert both wires into the ducts provided watch for the correct line colour as below 4 Please take care not to cause a short circuit between screen and data lines 5 Close the contact cover 6 Tighten screw max tightening torque 0 08Nm The green line must be connected to A the red lin...

Page 161: ...m length 0 DP slaves without fail safe mode were provided with the whole output telegram but with output data 0 The input data of the DP slaves were further cyclically transferred to the input area of the CPU n Master behavior at CPU RUN The global control command Operate is sent to the slaves by the master Here the DE LED is on Every connected DP slave is cyclically attended with an output telegr...

Page 162: ...mo version the CPUs 11x of the System 100V from VIPA may be configured To configure the SPEED7 CPUs a license for the profi version is necessary This may be online be received from VIPA and activated There are the following sources to get WinPLC7 n Online At www vipa com in the service area at Downloads a link to the current demo ver sion and the updates of WinPLC7 may be found n CD SW211C1DD WinP...

Page 163: ... this at Activation code and click at OK ð Now WinPLC7 is activated as Profi version To find a station via Ethernet accessible nodes you have to install the WinPCAP driver This driver may be found on your PC in the installation directory at WinSPS S7 V5 WinPcap_ exe Execute this file and follow the instructions 9 3 Example project engineering 9 3 1 Job definition In the example a FC 1 is programme...

Page 164: ...w project with Create a new solution 1 For the call of the hardware configurator it is necessary to set WinPLC7 from the Simulator Mode to the Offline Mode For this and the communication via Ethernet set Target TCP IP Direct 2 Double click to Hardware stations and here at Create new 3 Enter a station name Please consider that the name does not contain any spaces 4 After the load animation choose i...

Page 165: ...ront flap of the CPU 12 For the temporary setting of an IP address select you CPU and click to Temporary setting of the IP parameters Please enter the same IP parameters you configured in the CPU properties and click to Write Parameters 13 Confirm the message concerning the overall reset of the CPU ð The IP parameters are transferred to the CPU and the list of accessible stations is refreshed 14 S...

Page 166: ...Name value1 Press the Return key ð The cursor jumps to the column with the data type 2 The data type may either directly be entered or be selected from a list of available data types by pressing the Return key Set the data type to INT and press the Return key ð Now the cursor jumps to the Comment column 3 Here enter 1 compare value and press the Return key ð A new in à row is created and the curso...

Page 167: ... drag drop from the hardware catalog or by double click at them in the hardware catalog 3 Open in the catalog the category Comparator and add the operation CMP I to your network 4 Click to the input left above and insert value1 Since these are block parameters a selection list of block parameters may be viewed by entering 5 Type in and press the Return key 6 Choose the corresponding parameter of t...

Page 168: ...finished now Adding a new network For further comparisons the operations CMP I at Q 124 1 and CMP I at Q 124 2 are necessary Create a network for both operations with the following proceeding 1 Move your mouse at an arbitrary position on the editor window and press the right mouse key 2 Select at context menu è Insert new network ð A dialog field is opened to enter the position and number of the n...

Page 169: ...lowing structure The FC 1 is to be called from the cycle OB 1 1 Go to OB 1 which was automatically created with starting the project 2 Go to Project content or to Solution and open the OB 1 by a double click 3 Change to the STL view Creating the block OB 1 VIPA System 300S WinPLC7 Example project engineering Project engineering HB140 CPU 314 6CF23 en 19 01 169 ...

Page 170: ...th Load all blocks into the PLC 3 Switch the CPU to RUN by clicking at RUN in the CPU Control Center of Edit project ð The displayed state changes from STOP to RUN 4 To view the process image select View è Display process image window or click at ð The various areas are displayed 5 Double click to the process image and enter at Line 2 the address PQB 124 Con firm your input with OK A value marked ...

Page 171: ... click to the output module open its properties dialog and enter the Module address 124 3 Switch the operating mode switch to RUN by means of the mouse ð Your program is executed and displayed in the simulator now 9 3 4 Transfer PLC program to CPU and its execution 1 For transfer to the CPU set the transfer mode to Target TCP IP Direct 2 If there are more network adapters in your PC the network ad...

Page 172: ...all blocks 8 Switch your CPU to RUN state 9 Open the OB 1 by double click 10 Change the value of one variable save the OB 1 and transfer it to the CPU ð According to your settings the process image changes immediately The status of your blocks may be displayed with Block è Monitoring On Off VIPA System 300S WinPLC7 Example project engineering Transfer PLC program to CPU and its execution HB140 CPU...

Page 173: ...nfigured and linked For diagnostics online tools are available Information about the Siemens TIA Portal can be found in the online help respectively in the according online documentation To start the Siemens TIA Portal with Windows select Start è Programs è Siemens Automation è TIA Then the TIA Portal opens with the last settings used With the menu Project è Exit in the Project view you may exit t...

Page 174: ...w to all constituent parts of your project The Project view is divided into the following areas 1 Menu bar with toolbars 2 Project tree with Details view 3 Project area 4 Device overview of the project respectively area for block programming 5 Properties dialog of a device parameter respectively information area 6 Hardware catalog and tools 7 Task Cards to select hardware catalog tasks and librari...

Page 175: ...rofile rail Device overview Module Slot Type PLC 2 CPU 317 2DP MPI DP interface 2 X1 MPI DP interface DP interface 2 X2 DP interface Since the CPU from VIPA is configured as Siemens CPU so the setting of the parame ters takes place via the Siemens CPU For parametrization click in the Project arearespectively in the Device overview at the CPU part Then the parameters of the CPU part are shown in th...

Page 176: ...vice over view Device overview Module Slot Type PLC 2 CPU 3 DI 4 DI DO 5 DO DIO 6 DIO AI 7 AI AO 8 AO For parametrization click in the Project area respectively in the Device overview on the module you want to parameterize The parameters of the module appear in the Proper ties dialog Here you can make your parameter settings Hardware configuration of the modules Parametrization VIPA System 300S Co...

Page 177: ...e with the following proceeding Determine the current Ethernet MAC address of your Ethernet PG OP channel This can be found as 1 address under the front flap of the CPU on a sticker on the left side You get valid IP address parameters from your system administrator The assignment of the IP address data happens online in the Siemens TIA Portal with the following pro ceeding 1 Start the Siemens TIA ...

Page 178: ...igure in the Device configuration a Siemens CPU 317 2DP 6ES7 317 2AK14 0AB0 V3 3 3 Configure the System 300 modules 4 For the Ethernet PG OP channel you have to configure a Siemens CP 343 1 6GK7 343 1EX11 0XE0 always as last module after the really plugged modules 5 Open the Property dialog by clicking on the CP 343 1EX11 and enter for the CP at Properties at Ethernet address the IP address data w...

Page 179: ...e GSD files may be found at www vipa com at the service area The integration of the SPEEDBUS GSD takes place with the following proceeding 1 Go to the service area of www vipa com 2 Load from the download area at Config files è PROFIBUS the according file for your System 300S 3 Extract the file to your work directory 4 Start the hardware configurator from Siemens 5 Close every project 6 Select Opt...

Page 180: ...ure your System 300 modules 4 Configure your Ethernet PG OP channel always as last module after the really plugged modules 5 Configure always as last module a Siemens DP master CP 342 5 342 5DA02 V5 0 Connect and parameterize it at operation mode DP Master Device overview Module Slot Type PLC 2 CPU 3 DI 4 DI DO 5 DO DIO 6 DIO AI 7 AI AO 8 AO CP 343 1 9 CP 343 1 CP 342 5 10 CP 342 5 Proceeding VIPA...

Page 181: ...he slave system and open the Device overview in the Project area 5 Configure at slot 1 the VIPA CPU 314 6CF23 of the hardware catalog from VIPA_SPEEDbus 6 By double clicking the placed CPU 314 6CF23 the properties dialog of the CPU is showed Device overview Module Slot Type Slave 0 VIPA SPEEDbus 314 6CF23 1 314 6CF23 2 ð As soon as the project is transferred together with the PLC user program to t...

Page 182: ... on the file TIA_Vxx zip and copy all the files and folders in a work directory for the Siemens TIA Portal 1 Start the Siemens TIA Portal with your project 2 Switch to the Project view 3 Choose Libraries from the task cards on the right side 4 Click at Global libraries 5 Click at Open global libraries 6 Navigate to your directory and load the file TIA alxx 7 Copy the necessary blocks from the libr...

Page 183: ...ording Ethernet interface you have to assign IP address parame ters by means of the initialization Please consider to use the same IP address data in your project for the CP 343 1 1 For the transfer connect if not already done the appropriate Ethernet jack to your Ethernet 2 Open your project with the Siemens TIA Portal 3 Click in the Project tree at Online access and choose here by a double click...

Page 184: ...er pro gram is not completely loaded and the SF LED gets on When a memory card has been installed the write command stores the content of the RAM as S7PROG WLD on the memory card The write command can be found in the Siemens TIA Portal in the Task card Online tools in the command area at Memory as button Copy RAM to ROM The MC LED blinks during the write access When the LED expires the write proce...

Page 185: ...Appendix VIPA System 300S Appendix HB140 CPU 314 6CF23 en 19 01 185 ...

Page 186: ...Content A System specific event IDs 187 B Integrated blocks 235 C SSL partial list 239 VIPA System 300S Appendix HB140 CPU 314 6CF23 en 19 01 186 ...

Page 187: ...rence of the sub module 12 Diagnostic interrupt outgoing 13 Cross traffic connection message 14 Neighbourhood change message 15 Synchronisation message bus 16 Synchronisation message device 17 Network component message 18 Clock synchronisation message bus 31 Pull interrupt component 32 Vendor specific interrupt min 33 Vendor specific interrupt topology change 127 Vendor specific interrupt max ZINF...

Page 188: ...O2 Slot of the master ZINFO2 Page frame master 0xE016 Maximum block size exceeded in master transfer ZINFO1 Periphery address ZINFO2 Slot 0xE017 Error in access to integrated slave 0xE018 Error in mapping the master periphery 0xE019 Error on standard backplane bus system detection 0xE01A Error at detection of the operating mode 8 9 bit 0xE01B Error Maximum number of plug in components exceeded 0xE...

Page 189: ... block number in the telegram 13 Faulty block type in the telegram 14 Inactive function 15 Wrong size in the telegram 20 Error in writing on MMC 90 Faulty buffer size 98 Unknown error 99 Internal error 0xE0CD Error at DP V1 job management ZINFO1 Not user relevant ZINFO2 Not user relevant ZINFO3 Not user relevant DatID Not user relevant 0xE0CE Error Time out when sending i slave diagnostics 0xE100 ...

Page 190: ...ck type 56 OB 65 DB 66 SDB 67 FC 68 SFC 69 FB 70 SFB 97 VDB 98 VSDB 99 VFC 100 VSFC 101 VFB 102 VSFB 111 VOB ZINFO2 Block number ZINFO3 Block length 0xE21E Memory card reading Error in recharging after memory reset Protect wld file too large OB Not user relevant 0xE21F Memory card reading Error at reload after memory reset checksum error when reading OB Not user relevant PK Not user relevant ZINFO...

Page 191: ...s the activated FSC OB The inserted FSC is compatible with the CPU PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2568 FSC C0ME040 3450 955 C000M30 3903 955 C000S30 4361 FSC C000M30 4940 FSC C000S30 5755 955 C0ME040 6843 FSC C0NE040 8561 FSC C000S20 9012 FSC C000M20 13895 955 C000060 15618 955 C000S20 16199 955 C000M20 17675 FSC C000S00 18254 FSC C000M00 20046 FSC C000...

Page 192: ... 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word 0xE401 FSC card was removed OB Action after the end of the trial time 0 No action 1 CPU STOP 2 CPU STOP and FSC deactivated 3 Factory reset 255 FSC was not activated PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2568 FSC C0ME040 3450 955 C000M30 ...

Page 193: ...00M40 38050 FSC C00MC10 41460 955 C000M50 41526 955 C0PE040 42655 FSC C00MC00 47852 955 C00MC00 48709 FSC C0PE040 50574 955 C000M70 52366 955 C000030 53501 FSC C000030 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word DatID FeatureSet Trialtime in minutes 0xE402 A configured functionality is not activated The configuration is...

Page 194: ...FSC C000S30 5755 955 C0ME040 6843 FSC C0NE040 8561 FSC C000S20 9012 FSC C000M20 13895 955 C000060 15618 955 C000S20 16199 955 C000M20 17675 FSC C000S00 18254 FSC C000M00 20046 FSC C000040 21053 955 C000040 22904 955 C000S00 23357 955 C000M00 24576 955 C000050 35025 955 C00MC10 36351 FSC C000S40 36794 FSC C000M40 37260 955 C000S40 37833 955 C000M40 38050 FSC C00MC10 41460 955 C000M50 41526 955 C0PE...

Page 195: ...ired OB Action after the end of the trial time 0 No action 1 CPU STOP 2 CPU STOP and FSC deactivated 3 Factory reset 255 FSC was not activated PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040 2568 FSC C0ME040 3450 955 C000M30 3903 955 C000S30 4361 FSC C000M30 4940 FSC C000S30 5755 955 C0ME040 6843 FSC C0NE040 8561 FSC C000S20 9012 FSC C000M20 13895 955 C000060 15618 955 ...

Page 196: ... 50574 955 C000M70 52366 955 C000030 53501 FSC C000030 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word DatID FeatureSet Trialtime in minutes 0xE406 The inserted feature set is corrupt PK FSC source 0 CPU 1 Card 0xE410 A CPU feature set was activated PK FSC source 0 CPU 1 Card ZINFO1 FSC CRC 1146 955 C000070 1736 955 C0NE040...

Page 197: ...0MC10 36351 FSC C000S40 36794 FSC C000M40 37260 955 C000S40 37833 955 C000M40 38050 FSC C00MC10 41460 955 C000M50 41526 955 C0PE040 42655 FSC C00MC00 47852 955 C00MC00 48709 FSC C0PE040 50574 955 C000M70 52366 955 C000030 53501 FSC C000030 58048 FSC C000020 63411 955 C000M60 65203 955 C000020 ZINFO2 FSC serial number high word ZINFO3 FSC serial number low word 0xE500 Memory management Deleted bloc...

Page 198: ...INFO1 Error code 1 Parser error SDB structure 2 Parser error SDB is not a valid SDB type ZINFO2 SDB type ZINFO3 SDB number 0xE502 Error in protect wld ZINFO2 Block type 56 OB 65 DB 66 SDB 67 FC 68 SFC 69 FB 70 SFB 97 VDB 98 VSDB 99 VFC 100 VSFC 101 VFB 102 VSFB 111 VOB ZINFO3 Block number VIPA System 300S System specific event IDs HB140 CPU 314 6CF23 en 19 01 198 ...

Page 199: ... for Ethernet PG OP channel ZINFO1 Periphery address ZINFO3 0 periphery address is input 1 periphery address is output 0xE605 Too many productive connections configured ZINFO1 Interface slot ZINFO2 Number of configured connections ZINFO3 Number of admissible connections 0xE610 On board PROFIBUS MPI Bus error removed PK Not user relevant ZINFO1 Interface ZINFO2 Not user relevant ZINFO3 Not user rel...

Page 200: ... user relevant DatID Master system ID 0xE721 Internal error Please contact the hotline ZINFO1 Not user relevant ZINFO2 Master system ID ZINFO3 Not user relevant DatID Not user relevant 0xE722 Internal error Please contact the hotline ZINFO1 Channel Event 0 Channel offline 1 Bus error 2 Internal error ZINFO2 Master system ID DatID Not user relevant 0xE723 Internal error Please contact the hotline Z...

Page 201: ... and executed 0xE808 Internal error Please contact the hotline ZINFO2 Not user relevant ZINFO3 Not user relevant 0xE809 Internal error Please contact the hotline ZINFO3 Not user relevant 0xE80A Internal error Please contact the hotline ZINFO3 Status 0 OK 65153 File create error 65185 File writing error 65186 Odd address for reading 0xE80B CMD auto command DIAGBUF recognized and executed ZINFO3 Sta...

Page 202: ...24 Internal message 0xE825 Internal message 0xE826 Internal message 0xE827 Internal message 0xE828 Internal message 0xE829 Internal message 0xE82A CMD auto command CPUTYPE_318 recognized and executed ZINFO3 Error code 0xE82B CMD auto command CPUTYPE_ORIGINAL recognized and executed ZINFO3 Error code 0xE82C CMD auto command WEBVISU_PGOP_ENABLE recognized and executed 0xE82D CMD auto command WEBVISU...

Page 203: ...eripheral area ZINFO1 Peripheral address ZINFO2 Slot ZINFO3 Data width 0xE920 Configuration error PROFINET ZINFO1 Position 0 Error code 0xE980 Error when loading the WebVisu project file 0xE981 Error in the configuration of the WebVisu project 0xE982 Internal error of the WebVisu server 0xE983 Hardware configuration of the control is not loaded WebVisu is not started 0xE984 WebVisu is blocked by t...

Page 204: ...tion in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set PK Not user relevant ZINFO1 Slot ZINFO2 Status 0 OK 1 Error 2 Empty 3 Bu...

Page 205: ...FO2 Slot ZINFO3 Output data width of the plugged component 0xEA10 SBUS Input periphery address outside the periphery area ZINFO1 Periphery address ZINFO2 Slot ZINFO3 Data width 0xEA11 SBUS Output periphery address outside the periphery area ZINFO1 Periphery address ZINFO2 Slot ZINFO3 Data width 0xEA12 SBUS Error in writing dataset ZINFO1 Slot ZINFO2 Dataset number ZINFO3 Dataset length 0xEA14 SBUS...

Page 206: ...ion for X2 0xEA23 Error Configuration RS485 interface X3 Value is outside the limits ZINFO2 Configuration for X3 0xEA24 Error Configuration RS485 interface X2 X3 Interface protocol missing default settings are used ZINFO2 Configuration for X2 ZINFO3 Configuration for X3 0xEA30 Internal error Please contact the hotline ZINFO1 Status ZINFO2 Not user relevant ZINFO3 Not user relevant 0xEA40 Internal ...

Page 207: ...oller Too many configured PROFINET IO devices ZINFO1 Number of configured devices ZINFO2 Slot ZINFO3 Maximum possible number of devices 0xEA54 PROFINET IO controller Multiple configuration of a periphery address PK Not user relevant ZINFO1 Logical address of the IO system ZINFO2 Rack slot of the controller ZINFO3 Base address of the block which is too large DatID Not user relevant 0xEA55 PROFINET ...

Page 208: ... Too many input bytes per device ZINFO1 Bit 5 Too many output bytes per device ZINFO1 Bit 6 Too many productive connections ZINFO1 Bit 7 Too many input bytes in the process image ZINFO1 Bit 8 Too many output bytes in the process image ZINFO1 Bit 9 Configuration not available ZINFO1 Bit 10 Configuration invalid ZINFO1 Bit 11 Refresh interval too small ZINFO1 Bit 12 Refresh interval too large ZINFO1...

Page 209: ...r Service PK Rack slot ZINFO1 StackError Error Code ZINFO2 StackError Error Detail ZINFO3 Position 0 StackError Error AdditionalDetail ZINFO3 Position 8 StackError Error AreaCode DatID StackError DeviceRef 0xEA67 PROFINET IO controller Error reading dataset OB Rack slot of the controller PK Error type 0 Dataset error local 1 Dataset error stack 2 Dataset error station ZINFO1 Dataset number ZINFO2 ...

Page 210: ...rviceError Detail ZINFO3 Position 0 ServiceError AdditionalDetail ZINFO3 Position 8 ServiceError AreaCode 0xEA6B PROFINET IO controller Incorrect Vendor ID OB Operating mode 0 Configuration in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDAT...

Page 211: ...hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set PK Rack slot ZINFO1 Device ID 0xEA6D PROFINET IO controller No empty name OB Operating mode 0 Configuration in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTU...

Page 212: ... condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set PK Rack slot ZINFO1 Device ID ZINFO2 Not user relevant ZINFO3 Not user relevant DatID Not...

Page 213: ...NFO1 Device ID ZINFO2 Not user relevant ZINFO3 Not user relevant DatID Not user relevant 0xEA70 PROFINET IO controller PROFINET stack configuration error OB UnsupportedApiError api PK Rack slot ZINFO1 UnsupportedApiError slot ZINFO2 UnsupportedApiError subslot DatID UnsupportedApiError deviceID 0xEA71 Internal error Please contact the hotline PK Rack slot ZINFO1 functionIndex ZINFO2 Not user relev...

Page 214: ... PK Not user relevant ZINFO1 Filenamehash 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID SvnRevision 0xEA82 Internal error Please contact the hotline OB Not user relevant PK Not user relevant ZINFO1 Filenamehash 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID SvnRevision 0xEA83 Internal error Please contact the hotline OB Not user relevant PK Not user relevant ZINFO1 Filenamehash 0 3 ZINFO2 Filenameh...

Page 215: ...sh 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID Current job number 0xEA93 Internal error Please contact the hotline OB Current OB number PK Core status 0 INIT 1 STOP 2 READY 3 PAUSE 4 RUN ZINFO1 Filenamehash 0 3 ZINFO2 Filenamehash 4 7 ZINFO3 Line DatID Current job number 0xEA97 Internal error Please contact the hotline ZINFO3 Slot 0xEA98 Error in file reading via SBUS PK Not user relevant ZINFO3...

Page 216: ...lization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO1 Diagnostic address of the master ZINFO2 Not user relevant ZINFO3 Number of errors which occurred 0xEAB0 Invalid link mode OB Current operating mode 0...

Page 217: ...mode undefined 6 Auto Negotiation 0xEAC0 Internal error Please contact the hotline ZINFO1 Error code 2 Internal error 3 Internal error 4 Internal error 5 Internal error 6 Internal error 7 Internal error 8 Internal error 8 Internal error 0xEAD0 SyncUnit configuration error ZINFO1 Status 0xEB02 System SLIO error Preset configuration does not match actual configuration ZINFO1 Bit mask slots 1 16 ZINF...

Page 218: ...cess image 0xEB10 System SLIO error Bus error PK Not user relevant ZINFO1 Error type 96 Bus enumeration error 128 General error 129 Queue execution error 130 Error interrupt ZINFO2 Error on bus enumeration error ZINFO1 DatID Not user relevant 0xEB11 System SLIO error Error during bus initialization PK Not user relevant DatID Not user relevant 0xEB20 System SLIO error Interrupt information undefine...

Page 219: ...tions is not supported 2 Master system ID invalid 3 Slot invalid 4 Master configuration invalid 5 Master type invalid 6 Slave diagnostic address invalid 7 Slave address invalid 8 Slave module IO configuration invalid 9 Logical address already in use 10 Internal error 11 IO mapping error 12 Error 13 Error in initialising the EtherCAT stack is entered by the CP 14 Slave station number already occupi...

Page 220: ...ence clock is not in Beckhoff Mode 3 The station address could not be determined for checking station address in ZINFO1 is accordingly 0 4 The slave information could not be determined for checking station address in ZINFO1 is accordingly 0 5 The EtherCAT status of the drive could not be determined 6 Error when sending the SDO request for further information the subsequent event with the ID 0xED60...

Page 221: ...ion available DatID Input address DatID Output address 0xEC11 EtherCAT Recurrence bus with missing slaves ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO2 Diagnostic address of the master ZINFO3 Number of stations which are not in the same state as the master...

Page 222: ...lable DatID Station available DatID Input address DatID Output address 0xEC30 EtherCAT Topology OK ZINFO2 Diagnostic address of the master 0xEC40 Bus cycle time infringement resolved ZINFO2 Logical address of the IO system 0xEC50 EtherCAT Distributed clocks DC out of sync OB Operating mode 0 Configuration in operating condition RUN 1 STOP update 2 STOP memory reset 3 STOP auto initialization 4 STO...

Page 223: ...3 Position 0 Station number ZINFO3 Position 11 IO system ID ZINFO3 Bit 15 System ID DP PN 0xED10 EtherCAT Breakdown bus ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO2 Diagnostic address of the master ZINFO3 Number of stations which are not in the same state...

Page 224: ...quested status 19 Bootstrap not supported 20 No valid firmware 22 Invalid mailbox configuration 22 Invalid mailbox configuration 23 Invalid sync manager configuration 24 No valid inputs available 25 No valid outputs available 26 Synchronisation error 27 Sync manager watchdog 28 Invalid sync manager types 29 Invalid output configuration 30 Invalid input configuration 31 Invalid watchdog configurati...

Page 225: ...ile Over EtherCAT 79 Error in acyclic data exchange Vendorspecific Over EtherCAT DatID Station not available DatID Station available DatID Input address DatID Output address 0xED20 EtherCAT Bus state change without calling OB86 ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 S...

Page 226: ...O3 Error code 4 Cancel master state change 8 Busy 11 Invalid parameters 14 Invalid status 16 Time out DatID Station available DatID Station not available DatID Output address DatID Input address 0xED22 EtherCAT Slave status change that does not generate an OB86 ZINFO1 Position 0 New status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO1 Position 8 Previous status 0 Undefined Unk...

Page 227: ...watchdog configuration 32 Slave station needs cold start 33 Slave station needs to be in INIT state 34 Slave station needs to be in PreOp state 35 Slave station needs to be in SafeOp state 45 Invalid output FMMU configuration 46 Invalid input FMMU configuration 48 Invalid DC Sync configuration 49 Invalid DC Latch configuration 50 PLL error 51 Invalid DC IO error 52 Invalid DC time out error 66 Err...

Page 228: ...TARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO1 Master status 0 Undefined Unkown 1 Init 2 PreOp 3 Bootstrap 4 SafeOp 8 Op ZINFO2 EtherCAT configuration present 0 There is no EC configuration 1 There is an EC configuration ZIN...

Page 229: ...5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO2 Diagnostic address of the master ZINFO3 DC state change 0 Master 1 Slave 0xED60 EtherCAT Diagnostic buffer CP Slave status change OB Operating mode 0 Configuration in operati...

Page 230: ...nvalid requested status change 18 Unknown requested status 19 Bootstrap not supported 20 No valid firmware 22 Invalid mailbox configuration 22 Invalid mailbox configuration 23 Invalid sync manager configuration 24 No valid inputs available 25 No valid outputs available 26 Synchronisation error 27 Sync manager watchdog 28 Invalid sync manager types 29 Invalid output configuration 30 Invalid input c...

Page 231: ...hange Vendorspecific Over EtherCAT DatID Cause for slave status change 0 Regular slave status change 1 Slave failure 2 Recurrence slave 3 Slave is in an error state 4 Slave has unexpectedly changed its status 0xED61 EtherCAT Diagnostic buffer CP CoE emergency OB EtherCAT station address high byte PK EtherCAT station address low byte ZINFO1 Position 0 Error register ZINFO1 Position 8 MEF Byte1 ZINF...

Page 232: ...OP auto initialization 4 STOP internal 5 STARTUP cold start 6 STARTUP restart warm start 7 STARTUP hot restart 9 RUN 10 HALT 11 COUPLING 12 UPDATING 13 DEFECTIVE 14 Error search mode 15 De energised 253 Process image release in STOP 254 Watchdog 255 Not set ZINFO1 Diagnostic address of the master ZINFO2 EtherCAT station address 0xED80 Bus error occurred receive time out ZINFO1 Logical address of t...

Page 233: ...e PK Not user relevant ZINFO3 Not user relevant DatID Not user relevant 0xF9C1 Restart of the component OB NCM_EVENT 1 OVS Component start up request was denied 3 Component data basis invalid 6 IP_CONFIG New IP address assigned by STEP7 configuration 10 IP_CONFIG A non configured new IP address was assigned 13 HW reset at P bus for CPU memory reset 19 Switch actuation from STOP to RUN causes the r...

Page 234: ...nent part of the component data base is deleted by the rack component after being loaded 70 Restore factory defaults same as memory reset of CPU 83 Network interface automatic configuration TP ITP with 10 Mbit s semi duplex 96 The MAC address was retrieved from the system SDB This is the configured address 97 The MAC address was retrieved from the boot EPROM This is the factory provided address 10...

Page 235: ... 40 HW_INT0 Hardware interrupt OB 55 DP STATUS ALARM Status interrupt OB 56 DP UPDATE ALARM Update interrupt OB 57 DP MANUFACTURE ALARM Vendor specific interrupt OB 80 CYCL_FLT Time error OB 81 PS_FLT Power supply error OB 82 I O_FLT1 Diagnostics interrupt OB 83 I O_FLT2 Insert remove module OB 85 OBNL_FLT Priority class error OB 86 RACK_FLT Slave failure restart OB 100 COMPLETE RESTART Start up O...

Page 236: ...C_RWOD Function is used internally SFB 239 FUNC Function is used internally SFB 240 DPRAM Function is used internally SFC Name Description SFC 0 SET_CLK Set system clock SFC 1 READ_CLK Read system clock SFC 2 SET_RTM Set run time meter SFC 3 CTRL_RTM Control run time meter SFC 4 READ_RTM Read run time meter SFC 5 GADR_LGC Logical address of a channel SFC 6 RD_SINFO Read start information SFC 7 DP_...

Page 237: ...FC 40 EN_IRT Enabling interrupts SFC 41 DIS_AIRT Delaying interrupts SFC 42 EN_AIRT Enabling delayed interrupts SFC 43 RE_TRIGR Re trigger the watchdog SFC 44 REPL_VAL Replace value to ACCU1 SFC 46 STP STOP the CPU SFC 47 WAIT Delay the application program SFC 49 LGC_GADR Read the slot address SFC 51 RDSYSST Read system status list SSL SFC 52 WR_USMSG Write user entry into diagnostic buffer SFC 53...

Page 238: ...08 ALARM_DQ ALARM_DQ SFC 193 AI_OSZI Oscilloscope FIFO function SFC 194 DP_EXCH Data exchange with CP 342S SFC 195 FILE_ATT Change file attributes SFC 208 FILE_OPN Open file SFC 209 FILE_CRE Create file SFC 210 FILE_CLO Close file SFC 211 FILE_RD Read file SFC 212 FILE_WR Write file SFC 213 FILE_SEK Position pointer SFC 214 FILE_REN Rename file SFC 215 FILE_DEL Delete file SFC 216 SER_CFG Parametr...

Page 239: ...h Status of the LEDs xy91h Status information CPU xy92h Stations status information DPM xy94h Stations status information DPM PROFINET IO and EtherCAT xy96h Module status information PROFIBUS DP PROFINET IO EtherCAT xyA0h Diagnostic buffer of the CPU xyB1h Module diagnostic information record set 0 xyB2h Module diagnostic information record set 1 via physical address xyB3h Module diagnostic inform...

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