Gate control via SW/HW-gate, aborting (parametrization: record set 0, byte 0, bit
7 ... 3 = 00001b)
SW-gate
HW-gate
Reaction counter
Edge 0-1
1
Continue
1
Edge 0-1
Restart with
Load value
Gate control via SW/HW-gate, interrupting (parametrization: record set 0, byte 0, bit
7 ... 3 = 10001b)
SW-gate
HW-gate
Reaction counter
Edge 0-1
1
Continue
1
Edge 0-1
Continue
Gate control via
SW/HW gate
, operating mode "count once": If the internal gate has been
closed automatically it may only be opened again under the following conditions:
SW-gate
HW-gate
Reaction I-gate
1
Edge 0-1
1
Edge 0-1
(after edge 0-1 at HW-gate)
1
1
n
As soon as during a count process a positive edge is recognized at the "Latch" input
of a counter, the recent counter value is stored in the according latch register.
n
You may access the latch register via the input image. For this set bit 8 of the output
status word.
n
At a new latch value additionally bit 15 is set in the input status word.
n
By setting bit 8 in the output status word you may read the recent latch value of the
according counter and reset the bit 15 of the input status word.
You pre-define the behavior of the counter output via the parametrization:
n
Output never switches
–
The output remains unaffected by the counter and is set as standard output.
n
Output switches when counter value
³
comparison value
–
The output remains set as long as the
counter value
is higher or equal
compar-
ison value
.
n
Output switches when counter value
£
comparison value
–
The output remains set as long as the
counter value
is lower or equal
comparison
value
.
Gate control "Count once"
Latch function
Comparison
VIPA System 300S
+
Deployment I/O periphery
Counter - Additional functions
HB140 | CPU | 314-6CF23 | en | 19-01
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