Texas Instruments TMS320VC5509, Reference Manual

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Multichannel Control Registers (MCR1 and MCR2)
12-35 McBSP Registers SPRU592E
Table 12 − 10. MCR2 Bit Descriptions
Bit Field Value Description
15-10 Reserved 0 Reserved bits (not available for your use). They are read-only bits and
return 0s when read.
9 XMCME Transmit multichannel partition mode bit. XMCME determines whether only
32 channels or all 128 channels are to be individually selectable. XMCME
is only applicable if channels can be individually disabled/enabled or
masked/unmasked for transmission (XMCM is nonzero).
0 2-partition mode. Only partitions A and B are used. You can control up to
32 channels in the transmit multichannel selection mode selected with the
XMCM bits.
If XMCM = 01b or 10b , assign 16 channels to partition A with the XPABLK
bits. Assign 16 channels to partition B with the XPBBLK bits.
If XMCM = 11b (for symmetric transmission and reception), assign
16 channels to receive partition A with the RPABLK bits. Assign
16 channels to receive partition B with the RPBBLK bits.
You control the channels with the appropriate transmit channel enable
registers:
XCERA: Channels in partition A
XCERB: Channels in partition B
1 8-partition mode. All partitions (A through H) are used. You can control up
to 128 channels in the transmit multichannel selection mode selected with
the XMCM bits.
You control the channels with the appropriate transmit channel enable
registers:
XCERA: Channels 0 through 15
XCERB: Channels 16 through 31
XCERC: Channels 32 through 47
XCERD: Channels 48 through 63
XCERE: Channels 64 through 79
XCERF: Channels 80 through 95
XCERG: Channels 96 through 111
XCERH: Channels 112 through 127