Public Version
McBSP Register Manual
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Table 21-38. McBSP5 Registers Mapping Summary (continued)
Register Name
Type
Register
Address Offset
Physical Address
Width (Bits)
RW
32
0x0000 0060
0x4809 6060
RW
32
0x0000 0064
0x4809 6064
RW
32
0x0000 0068
0x4809 6068
RW
32
0x0000 006C
0x4809 606C
RW
32
0x0000 0070
0x4809 6070
RW
32
0x0000 0074
0x4809 6074
RW
32
0x0000 0078
0x4809 6078
R
32
0x0000 007C
0x4809 607C
RW
32
0x0000 0080
0x4809 6080
RW
32
0x0000 0084
0x4809 6084
RW
32
0x0000 0088
0x4809 6088
RW
32
0x0000 008C
0x4809 608C
RW
32
0x0000 0090
0x4809 6090
RW
32
0x0000 0094
0x4809 6094
RW
32
0x0000 00A0
0x4809 60A0
RW
32
0x0000 00A4
0x4809 60A4
RW
32
0x0000 00A8
0x4809 60A8
RW
32
0x0000 00AC
0x4809 60AC
RW
32
0x0000 00B0
0x4809 60B0
R
32
0x0000 00B4
0x4809 60B4
R
32
0x0000 00B8
0x4809 60B8
RW
32
0x0000 00BC
0x4809 60BC
R
32
0x0000 00C0
0x4809 60C0
Table 21-39. McBSP2 Registers Mapping Summary
Register Name
Type
Register
Address Offset
Physical Address
Width (Bits)
R
32
0x0000 0000
0x4902 2000
W
32
0x0000 0008
0x4902 2008
RW
32
0x0000 0010
0x4902 2010
RW
32
0x0000 0014
0x4902 2014
RW
32
0x0000 0018
0x4902 2018
RW
32
0x0000 001C
0x4902 201C
RW
32
0x0000 0020
0x4902 2020
RW
32
0x0000 0024
0x4902 2024
RW
32
0x0000 0028
0x4902 2028
RW
32
0x0000 002C
0x4902 202C
RW
32
0x0000 0030
0x4902 2030
RW
32
0x0000 0034
0x4902 2034
RW
32
0x0000 0038
0x4902 2038
RW
32
0x0000 003C
0x4902 203C
RW
32
0x0000 0040
0x4902 2040
RW
32
0x0000 0044
0x4902 2044
RW
32
0x0000 0048
0x4902 2048
RW
32
0x0000 004C
0x4902 204C
RW
32
0x0000 0050
0x4902 2050
RW
32
0x0000 0054
0x4902 2054
3156
Multi-Channel Buffered Serial Port
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated