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McBSP Register Manual
Table 21-55. Register Call Summary for Register MCBSPLP_RCR1_REG
McBSP Environment
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Words, Frames, and Phases Definitions
McBSP Functional Description
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•
Frame Phases (Dual-Phase Frame I2S Support)
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Configuring a Frame for Multichannel Selection
•
:
McBSP Basic Programming Model
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McBSP Initialization Procedure
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•
:
McBSP Register Manual
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McBSP Register Mapping Summary
:
Table 21-56. MCBSPLP_XCR2_REG
Address Offset
0x0000 0020
Physical Address
0x4807 4020
Instance
McBSP1
0x4809 6020
McBSP5
0x4902 2020
McBSP2
0x4902 4020
McBSP3
0x4902 6020
McBSP4
Description
McBSPLP transmit control register 2
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
XFRLEN2
XWDLEN2
XPHASE
XDATDLY
XREVERSE
RESERVED
Bits
Field Name
Description
Type
Reset
31:16
RESERVED
Read returns 0x0.
R
0x0000
15
XPHASE
Transmit Phases
RW
0x0
0x0: Single-phase frame
0x1: Dual-phase frame
14:8
XFRLEN2
Transmit Frame Length 2
RW
0x00
Single-phase frame selected: XFRLEN2=don't care
Dual-phase frame selected: XFRLEN2=000 0000 - 1
word per second phase
(other values are reserved)
7:5
XWDLEN2
Transmit Word Length 2
RW
0x0
0x0: 8 bits
0x1: 12 bits
0x2: 16 bits
0x3: 20 bits
0x4: 24 bits
0x5: 32 bits
0x6: Reserved (do not use)
0x7: Reserved (do not use)
3167
SWPU177N – December 2009 – Revised November 2010
Multi-Channel Buffered Serial Port
Copyright © 2009–2010, Texas Instruments Incorporated