Texas Instruments OMAP36 Series, Technical Reference Manual

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McBSP Register Manual
Table 21-111. Register Call Summary for Register MCBSPLP_SYSCONFIG_REG (continued)
McBSP Basic Programming Model
• McBSP Initialization Procedure : [7]
McBSP Register Manual
• McBSP Register Mapping Summary : [8] [9] [10] [11] [12]
Table 21-112. MCBSPLP_THRSH2_REG
Address Offset 0x0000 0090
Physical Address 0x4807 4090 Instance McBSP1
0x4809 6090 McBSP5
0x4902 2090 McBSP2
0x4902 4090 McBSP3
0x4902 6090 McBSP4
Description McBSPLP transmit buffer threshold (DMA or IRQ trigger)
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED XTHRESHOLD
Bits Field Name Description Type Reset
31:11 RESERVED Read returns 0x0. R 0x000000
10:0
(1)
XTHRESHOLD Transmit buffer threshold value. The DMA request (if RW 0x00
enabled) of interrupt assertion (if enabled) is triggered if
the number of free locations in the transmit buffer are
above or equal to the XTHRESHOLD value + 1. Also, this
value (XTHRESHOLD value + 1) indicates the number of
words transferred during a transmit data DMA request, if
transmit DMA is enabled.
(1)
XTHRESHOLD is an 11-bit field for McBSP2 only. For other McBSPs, XTHRESHOLD is an 8-bit field (bits 7 to 10 are reserved). In other
words, the other McBSPs are limited to a FIFO width of 0x7F.
Table 21-113. Register Call Summary for Register MCBSPLP_THRSH2_REG
McBSP Integration
• Power Management : [0]
McBSP Functional Description
• McBSP Transmission : [1]
• McBSP DMA Configuration : [2]
McBSP Basic Programming Model
• McBSP Initialization Procedure : [3]
• Data Transfer DMA Request Configuration : [4]
• Transmitter Configuration : [5]
McBSP Register Manual
• McBSP Register Mapping Summary : [6] [7] [8] [9] [10]
3191 SWPU177N – December 2009 – Revised November 2010 Multi-Channel Buffered Serial Port
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