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McBSP Register Manual
Table 21-126. MCBSPLP_XBUFFSTAT_REG
Address Offset
0x0000 00B4
Physical Address
0x4807 40B4
Instance
McBSP1
0x4809 60B4
McBSP5
0x4902 20B4
McBSP2
0x4902 40B4
McBSP3
0x4902 60B4
McBSP4
Description
McBSPLP transmit buffer status
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
XBUFFSTAT
Bits
Field Name
Description
Type
Reset
31:11
RESERVED
Read returns 0x0.
R
0x000000
10:0
(1)
XBUFFSTAT
Transmit Buffer Status (indicates the number of free
R
0x500
(2)
locations in the transmit buffer). The XBUFFSTAT value
reflects the buffer status on the L4 clock domain and it
can be bigger than the real number of the free locations
which are seen by the transmit state machine.
(1)
XBUFFSTAT is an 11-bit field for McBSP2 only. For other McBSPs, XBUFFSTAT is an 8-bit field (bits 8 to 10 are reserved).
(2)
The reset value of XBUFFSTAT for other McBSPs is 0x080.
Table 21-127. Register Call Summary for Register MCBSPLP_XBUFFSTAT_REG
McBSP Functional Description
•
Enable/Disable the Transmit and Receive Processes
•
McBSP Register Manual
•
McBSP Register Mapping Summary
:
Table 21-128. MCBSPLP_RBUFFSTAT_REG
Address Offset
0x0000 00B8
Physical Address
0x4807 40B8
Instance
McBSP1
0x4809 60B8
McBSP5
0x4902 20B8
McBSP2
0x4902 40B8
McBSP3
0x4902 60B8
McBSP4
Description
McBSPLP receive buffer status
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
RBUFFSTAT
Bits
Field Name
Description
Type
Reset
31:11
RESERVED
Read returns 0x0.
R
0x000000
10:0
(1)
RBUFFSTAT
Receive Buffer Status (indicates the number of occupied
R
0x00
locations in the receive buffer). The RBUFFSTAT value
reflects the buffer status on the L4 clock domain and it
can be smaller than the real number of the occupied
locations which are seen by the receive state machine.
(1)
RBUFFSTAT is an 11-bit field in McBSP2. For other McBSPs, RBUFFSTAT is an 8-bit field (bits 8 to 10 are reserved).
3201
SWPU177N – December 2009 – Revised November 2010
Multi-Channel Buffered Serial Port
Copyright © 2009–2010, Texas Instruments Incorporated